[llvm] 4ec35a0 - [VectorCombine] Fix crash when folding select of bitcast (#177183)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 28 07:13:55 PST 2026
Author: Mitch Briles
Date: 2026-01-28T15:13:50Z
New Revision: 4ec35a0b0e13f15ad38a2fa668004c892a365795
URL: https://github.com/llvm/llvm-project/commit/4ec35a0b0e13f15ad38a2fa668004c892a365795
DIFF: https://github.com/llvm/llvm-project/commit/4ec35a0b0e13f15ad38a2fa668004c892a365795.diff
LOG: [VectorCombine] Fix crash when folding select of bitcast (#177183)
Fixes #177144. Nits appreciated.
The fold in question does the following transformation:
Before
```
%bc = bitcast <4 x i32> %src to <16 x i8>
%e0 = extractelement <16 x i8> %bc, i32 0
%s0 = select i1 %cond, i8 %e0, i8 0
%e1 = extractelement <16 x i8> %bc, i32 1
%s1 = select i1 %cond, i8 %e1, i8 0
...
```
After
```
%sel = select i1 %cond, <4 x i32> %src, <4 x i32> zeroinitializer
%bc = bitcast <4 x i32> %sel to <16 x i8>
%e0 = extractelement <16 x i8> %bc, i32 0
%e1 = extractelement <16 x i8> %bc, i32 1
...
```
If every select shares the condition and has 0 in the false branch, the
bitcast can be replaced with a select between the original vector and
`zeroinitializer`, followed by a bitcast. Then each `select(cond,
extelt(...), 0)` can be replaced with `extelt(...)`.
The crash happens when the condition is defined after the original
bitcast, because the bitcast is replaced with the select + bitcast, and
now the select references a condition not yet defined.
Added:
Modified:
llvm/lib/Transforms/Vectorize/VectorCombine.cpp
llvm/test/Transforms/VectorCombine/AMDGPU/combine-scalar-selects.ll
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
index fbb3b820c4f05..fb6fa247038ac 100644
--- a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+++ b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
@@ -1655,7 +1655,13 @@ bool VectorCombine::foldSelectsFromBitcast(Instruction &I) {
}
// Create the vector select and bitcast once for this condition.
- Builder.SetInsertPoint(BC->getNextNode());
+ auto InsertPt = std::next(BC->getIterator());
+
+ if (auto *CondInst = dyn_cast<Instruction>(Cond))
+ if (DT.dominates(BC, CondInst))
+ InsertPt = std::next(CondInst->getIterator());
+
+ Builder.SetInsertPoint(InsertPt);
Value *VecSel =
Builder.CreateSelect(Cond, SrcVec, Constant::getNullValue(SrcVecTy));
Value *NewBC = Builder.CreateBitCast(VecSel, DstVecTy);
diff --git a/llvm/test/Transforms/VectorCombine/AMDGPU/combine-scalar-selects.ll b/llvm/test/Transforms/VectorCombine/AMDGPU/combine-scalar-selects.ll
index 8867387e1fad0..3111d74c895e6 100644
--- a/llvm/test/Transforms/VectorCombine/AMDGPU/combine-scalar-selects.ll
+++ b/llvm/test/Transforms/VectorCombine/AMDGPU/combine-scalar-selects.ll
@@ -1870,5 +1870,356 @@ entry:
ret void
}
+define i8 @fold_selects_from_bitcast_dominance_multiblock1(<4 x i32> %src, i8 %a, i1 %flag1, i1 %flag2) {
+; CHECK-OPT-LABEL: define i8 @fold_selects_from_bitcast_dominance_multiblock1(
+; CHECK-OPT-SAME: <4 x i32> [[SRC:%.*]], i8 [[A:%.*]], i1 [[FLAG1:%.*]], i1 [[FLAG2:%.*]]) #[[ATTR0]] {
+; CHECK-OPT-NEXT: [[COND:%.*]] = icmp eq i8 [[A]], 0
+; CHECK-OPT-NEXT: [[TMP1:%.*]] = select i1 [[COND]], <4 x i32> [[SRC]], <4 x i32> zeroinitializer
+; CHECK-OPT-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[TMP1]] to <16 x i8>
+; CHECK-OPT-NEXT: br i1 [[FLAG1]], label %[[FIRST:.*]], label %[[TRAMPOLINE:.*]]
+; CHECK-OPT: [[TRAMPOLINE]]:
+; CHECK-OPT-NEXT: br i1 [[FLAG2]], label %[[SECOND:.*]], label %[[THIRD:.*]]
+; CHECK-OPT: [[FIRST]]:
+; CHECK-OPT-NEXT: [[S00:%.*]] = extractelement <16 x i8> [[TMP2]], i32 0
+; CHECK-OPT-NEXT: [[S01:%.*]] = extractelement <16 x i8> [[TMP2]], i32 2
+; CHECK-OPT-NEXT: [[S0:%.*]] = add i8 [[S00]], [[S01]]
+; CHECK-OPT-NEXT: br label %[[END:.*]]
+; CHECK-OPT: [[SECOND]]:
+; CHECK-OPT-NEXT: [[S10:%.*]] = extractelement <16 x i8> [[TMP2]], i32 3
+; CHECK-OPT-NEXT: [[S11:%.*]] = extractelement <16 x i8> [[TMP2]], i32 4
+; CHECK-OPT-NEXT: [[S1:%.*]] = add i8 [[S10]], [[S11]]
+; CHECK-OPT-NEXT: br label %[[END]]
+; CHECK-OPT: [[THIRD]]:
+; CHECK-OPT-NEXT: [[S20:%.*]] = extractelement <16 x i8> [[TMP2]], i32 5
+; CHECK-OPT-NEXT: [[S21:%.*]] = extractelement <16 x i8> [[TMP2]], i32 6
+; CHECK-OPT-NEXT: [[S2:%.*]] = add i8 [[S20]], [[S21]]
+; CHECK-OPT-NEXT: br label %[[END]]
+; CHECK-OPT: [[END]]:
+; CHECK-OPT-NEXT: [[RES:%.*]] = phi i8 [ [[S0]], %[[FIRST]] ], [ [[S1]], %[[SECOND]] ], [ [[S2]], %[[THIRD]] ]
+; CHECK-OPT-NEXT: ret i8 [[RES]]
+;
+; CHECK-NOOPT-LABEL: define i8 @fold_selects_from_bitcast_dominance_multiblock1(
+; CHECK-NOOPT-SAME: <4 x i32> [[SRC:%.*]], i8 [[A:%.*]], i1 [[FLAG1:%.*]], i1 [[FLAG2:%.*]]) #[[ATTR0]] {
+; CHECK-NOOPT-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SRC]] to <16 x i8>
+; CHECK-NOOPT-NEXT: [[COND:%.*]] = icmp eq i8 [[A]], 0
+; CHECK-NOOPT-NEXT: br i1 [[FLAG1]], label %[[FIRST:.*]], label %[[TRAMPOLINE:.*]]
+; CHECK-NOOPT: [[TRAMPOLINE]]:
+; CHECK-NOOPT-NEXT: br i1 [[FLAG2]], label %[[SECOND:.*]], label %[[THIRD:.*]]
+; CHECK-NOOPT: [[FIRST]]:
+; CHECK-NOOPT-NEXT: [[E00:%.*]] = extractelement <16 x i8> [[BC]], i32 0
+; CHECK-NOOPT-NEXT: [[S00:%.*]] = select i1 [[COND]], i8 [[E00]], i8 0
+; CHECK-NOOPT-NEXT: [[E01:%.*]] = extractelement <16 x i8> [[BC]], i32 2
+; CHECK-NOOPT-NEXT: [[S01:%.*]] = select i1 [[COND]], i8 [[E01]], i8 0
+; CHECK-NOOPT-NEXT: [[S0:%.*]] = add i8 [[S00]], [[S01]]
+; CHECK-NOOPT-NEXT: br label %[[END:.*]]
+; CHECK-NOOPT: [[SECOND]]:
+; CHECK-NOOPT-NEXT: [[E10:%.*]] = extractelement <16 x i8> [[BC]], i32 3
+; CHECK-NOOPT-NEXT: [[S10:%.*]] = select i1 [[COND]], i8 [[E10]], i8 0
+; CHECK-NOOPT-NEXT: [[E11:%.*]] = extractelement <16 x i8> [[BC]], i32 4
+; CHECK-NOOPT-NEXT: [[S11:%.*]] = select i1 [[COND]], i8 [[E11]], i8 0
+; CHECK-NOOPT-NEXT: [[S1:%.*]] = add i8 [[S10]], [[S11]]
+; CHECK-NOOPT-NEXT: br label %[[END]]
+; CHECK-NOOPT: [[THIRD]]:
+; CHECK-NOOPT-NEXT: [[E20:%.*]] = extractelement <16 x i8> [[BC]], i32 5
+; CHECK-NOOPT-NEXT: [[S20:%.*]] = select i1 [[COND]], i8 [[E20]], i8 0
+; CHECK-NOOPT-NEXT: [[E21:%.*]] = extractelement <16 x i8> [[BC]], i32 6
+; CHECK-NOOPT-NEXT: [[S21:%.*]] = select i1 [[COND]], i8 [[E21]], i8 0
+; CHECK-NOOPT-NEXT: [[S2:%.*]] = add i8 [[S20]], [[S21]]
+; CHECK-NOOPT-NEXT: br label %[[END]]
+; CHECK-NOOPT: [[END]]:
+; CHECK-NOOPT-NEXT: [[RES:%.*]] = phi i8 [ [[S0]], %[[FIRST]] ], [ [[S1]], %[[SECOND]] ], [ [[S2]], %[[THIRD]] ]
+; CHECK-NOOPT-NEXT: ret i8 [[RES]]
+;
+ %bc = bitcast <4 x i32> %src to <16 x i8>
+ %cond = icmp eq i8 %a, 0
+ br i1 %flag1, label %first, label %trampoline
+
+trampoline:
+ br i1 %flag2, label %second, label %third
+
+first:
+ %e00 = extractelement <16 x i8> %bc, i32 0
+ %s00 = select i1 %cond, i8 %e00, i8 0
+ %e01 = extractelement <16 x i8> %bc, i32 2
+ %s01 = select i1 %cond, i8 %e01, i8 0
+ %s0 = add i8 %s00, %s01
+ br label %end
+
+second:
+ %e10 = extractelement <16 x i8> %bc, i32 3
+ %s10 = select i1 %cond, i8 %e10, i8 0
+ %e11 = extractelement <16 x i8> %bc, i32 4
+ %s11 = select i1 %cond, i8 %e11, i8 0
+ %s1 = add i8 %s10, %s11
+ br label %end
+
+third:
+ %e20 = extractelement <16 x i8> %bc, i32 5
+ %s20 = select i1 %cond, i8 %e20, i8 0
+ %e21 = extractelement <16 x i8> %bc, i32 6
+ %s21 = select i1 %cond, i8 %e21, i8 0
+ %s2 = add i8 %s20, %s21
+ br label %end
+
+end:
+ %res = phi i8 [%s0, %first], [%s1, %second], [%s2, %third]
+ ret i8 %res
+}
+
+define i8 @fold_selects_from_bitcast_dominance_multiblock2(<4 x i64> %v, i8 %a, i1 %flag) {
+; CHECK-OPT-LABEL: define i8 @fold_selects_from_bitcast_dominance_multiblock2(
+; CHECK-OPT-SAME: <4 x i64> [[V:%.*]], i8 [[A:%.*]], i1 [[FLAG:%.*]]) #[[ATTR0]] {
+; CHECK-OPT-NEXT: [[ENTRY:.*:]]
+; CHECK-OPT-NEXT: br label %[[FIRST:.*]]
+; CHECK-OPT: [[FIRST]]:
+; CHECK-OPT-NEXT: br label %[[SECOND:.*]]
+; CHECK-OPT: [[SECOND]]:
+; CHECK-OPT-NEXT: [[COND:%.*]] = icmp eq i8 [[A]], 0
+; CHECK-OPT-NEXT: [[TMP0:%.*]] = select i1 [[COND]], <4 x i64> [[V]], <4 x i64> zeroinitializer
+; CHECK-OPT-NEXT: [[TMP1:%.*]] = bitcast <4 x i64> [[TMP0]] to <32 x i8>
+; CHECK-OPT-NEXT: br i1 [[FLAG]], label %[[THEN:.*]], label %[[ELSE:.*]]
+; CHECK-OPT: [[THEN]]:
+; CHECK-OPT-NEXT: [[S1:%.*]] = extractelement <32 x i8> [[TMP1]], i64 0
+; CHECK-OPT-NEXT: br label %[[COMBINE:.*]]
+; CHECK-OPT: [[ELSE]]:
+; CHECK-OPT-NEXT: [[S2:%.*]] = extractelement <32 x i8> [[TMP1]], i64 7
+; CHECK-OPT-NEXT: br label %[[COMBINE]]
+; CHECK-OPT: [[COMBINE]]:
+; CHECK-OPT-NEXT: [[R1:%.*]] = phi i8 [ [[S1]], %[[THEN]] ], [ [[S2]], %[[ELSE]] ]
+; CHECK-OPT-NEXT: [[S3:%.*]] = extractelement <32 x i8> [[TMP1]], i64 1
+; CHECK-OPT-NEXT: [[S4:%.*]] = extractelement <32 x i8> [[TMP1]], i64 8
+; CHECK-OPT-NEXT: [[S5:%.*]] = extractelement <32 x i8> [[TMP1]], i64 9
+; CHECK-OPT-NEXT: [[R2:%.*]] = add i8 [[R1]], [[S3]]
+; CHECK-OPT-NEXT: [[R3:%.*]] = add i8 [[R2]], [[S4]]
+; CHECK-OPT-NEXT: [[R4:%.*]] = add i8 [[R3]], [[S5]]
+; CHECK-OPT-NEXT: ret i8 [[R4]]
+;
+; CHECK-NOOPT-LABEL: define i8 @fold_selects_from_bitcast_dominance_multiblock2(
+; CHECK-NOOPT-SAME: <4 x i64> [[V:%.*]], i8 [[A:%.*]], i1 [[FLAG:%.*]]) #[[ATTR0]] {
+; CHECK-NOOPT-NEXT: [[ENTRY:.*:]]
+; CHECK-NOOPT-NEXT: [[TMP0:%.*]] = bitcast <4 x i64> [[V]] to <32 x i8>
+; CHECK-NOOPT-NEXT: br label %[[FIRST:.*]]
+; CHECK-NOOPT: [[FIRST]]:
+; CHECK-NOOPT-NEXT: [[VECEXT1:%.*]] = extractelement <32 x i8> [[TMP0]], i64 0
+; CHECK-NOOPT-NEXT: [[VECEXT2:%.*]] = extractelement <32 x i8> [[TMP0]], i64 7
+; CHECK-NOOPT-NEXT: [[VECEXT3:%.*]] = extractelement <32 x i8> [[TMP0]], i64 1
+; CHECK-NOOPT-NEXT: [[VECEXT4:%.*]] = extractelement <32 x i8> [[TMP0]], i64 8
+; CHECK-NOOPT-NEXT: [[VECEXT5:%.*]] = extractelement <32 x i8> [[TMP0]], i64 9
+; CHECK-NOOPT-NEXT: br label %[[SECOND:.*]]
+; CHECK-NOOPT: [[SECOND]]:
+; CHECK-NOOPT-NEXT: [[COND:%.*]] = icmp eq i8 [[A]], 0
+; CHECK-NOOPT-NEXT: br i1 [[FLAG]], label %[[THEN:.*]], label %[[ELSE:.*]]
+; CHECK-NOOPT: [[THEN]]:
+; CHECK-NOOPT-NEXT: [[S1:%.*]] = select i1 [[COND]], i8 [[VECEXT1]], i8 0
+; CHECK-NOOPT-NEXT: br label %[[COMBINE:.*]]
+; CHECK-NOOPT: [[ELSE]]:
+; CHECK-NOOPT-NEXT: [[S2:%.*]] = select i1 [[COND]], i8 [[VECEXT2]], i8 0
+; CHECK-NOOPT-NEXT: br label %[[COMBINE]]
+; CHECK-NOOPT: [[COMBINE]]:
+; CHECK-NOOPT-NEXT: [[R1:%.*]] = phi i8 [ [[S1]], %[[THEN]] ], [ [[S2]], %[[ELSE]] ]
+; CHECK-NOOPT-NEXT: [[S3:%.*]] = select i1 [[COND]], i8 [[VECEXT3]], i8 0
+; CHECK-NOOPT-NEXT: [[S4:%.*]] = select i1 [[COND]], i8 [[VECEXT4]], i8 0
+; CHECK-NOOPT-NEXT: [[S5:%.*]] = select i1 [[COND]], i8 [[VECEXT5]], i8 0
+; CHECK-NOOPT-NEXT: [[R2:%.*]] = add i8 [[R1]], [[S3]]
+; CHECK-NOOPT-NEXT: [[R3:%.*]] = add i8 [[R2]], [[S4]]
+; CHECK-NOOPT-NEXT: [[R4:%.*]] = add i8 [[R3]], [[S5]]
+; CHECK-NOOPT-NEXT: ret i8 [[R4]]
+;
+entry:
+ %0 = bitcast <4 x i64> %v to <32 x i8>
+ br label %first
+
+first:
+ %vecext1 = extractelement <32 x i8> %0, i64 0
+ %vecext2 = extractelement <32 x i8> %0, i64 7
+ %vecext3 = extractelement <32 x i8> %0, i64 1
+ %vecext4 = extractelement <32 x i8> %0, i64 8
+ %vecext5 = extractelement <32 x i8> %0, i64 9
+ br label %second
+
+second:
+ %cond = icmp eq i8 %a, 0
+ br i1 %flag, label %then, label %else
+
+then:
+ %s1 = select i1 %cond, i8 %vecext1, i8 0
+ br label %combine
+
+else:
+ %s2 = select i1 %cond, i8 %vecext2, i8 0
+ br label %combine
+
+combine:
+ %r1 = phi i8 [%s1, %then], [%s2, %else]
+ %s3 = select i1 %cond, i8 %vecext3, i8 0
+ %s4 = select i1 %cond, i8 %vecext4, i8 0
+ %s5 = select i1 %cond, i8 %vecext5, i8 0
+ %r2 = add i8 %r1, %s3
+ %r3 = add i8 %r2, %s4
+ %r4 = add i8 %r3, %s5
+ ret i8 %r4
+}
+
+define i8 @fold_selects_from_bitcast_dominance_multiblock3(<4 x i64> %v1, <4 x i64> %v2, i8 %a, i1 %flag1, i1 %flag2, i1 %flag3, i1 %flag4, i1 %cond2) {
+; CHECK-OPT-LABEL: define i8 @fold_selects_from_bitcast_dominance_multiblock3(
+; CHECK-OPT-SAME: <4 x i64> [[V1:%.*]], <4 x i64> [[V2:%.*]], i8 [[A:%.*]], i1 [[FLAG1:%.*]], i1 [[FLAG2:%.*]], i1 [[FLAG3:%.*]], i1 [[FLAG4:%.*]], i1 [[COND2:%.*]]) #[[ATTR0]] {
+; CHECK-OPT-NEXT: [[ENTRY:.*:]]
+; CHECK-OPT-NEXT: [[TMP0:%.*]] = select i1 [[COND2]], <4 x i64> [[V2]], <4 x i64> zeroinitializer
+; CHECK-OPT-NEXT: [[TMP1:%.*]] = bitcast <4 x i64> [[TMP0]] to <32 x i8>
+; CHECK-OPT-NEXT: br label %[[FIRST:.*]]
+; CHECK-OPT: [[FIRST]]:
+; CHECK-OPT-NEXT: br label %[[T0:.*]]
+; CHECK-OPT: [[T0]]:
+; CHECK-OPT-NEXT: [[COND1:%.*]] = icmp eq i8 [[A]], 0
+; CHECK-OPT-NEXT: [[TMP2:%.*]] = select i1 [[COND1]], <4 x i64> [[V1]], <4 x i64> zeroinitializer
+; CHECK-OPT-NEXT: [[TMP3:%.*]] = bitcast <4 x i64> [[TMP2]] to <32 x i8>
+; CHECK-OPT-NEXT: br i1 [[FLAG1]], label %[[R0:.*]], label %[[T1:.*]]
+; CHECK-OPT: [[T1]]:
+; CHECK-OPT-NEXT: br i1 [[FLAG2]], label %[[R1:.*]], label %[[T2:.*]]
+; CHECK-OPT: [[T2]]:
+; CHECK-OPT-NEXT: br i1 [[FLAG3]], label %[[R2:.*]], label %[[T3:.*]]
+; CHECK-OPT: [[T3]]:
+; CHECK-OPT-NEXT: br i1 [[FLAG4]], label %[[R3:.*]], label %[[R4:.*]]
+; CHECK-OPT: [[R0]]:
+; CHECK-OPT-NEXT: [[RES0:%.*]] = extractelement <32 x i8> [[TMP3]], i64 0
+; CHECK-OPT-NEXT: [[RES1:%.*]] = extractelement <32 x i8> [[TMP1]], i64 1
+; CHECK-OPT-NEXT: [[RES01:%.*]] = add i8 [[RES0]], [[RES1]]
+; CHECK-OPT-NEXT: ret i8 [[RES01]]
+; CHECK-OPT: [[R1]]:
+; CHECK-OPT-NEXT: [[RES2:%.*]] = extractelement <32 x i8> [[TMP3]], i64 2
+; CHECK-OPT-NEXT: [[RES3:%.*]] = extractelement <32 x i8> [[TMP1]], i64 3
+; CHECK-OPT-NEXT: [[RES23:%.*]] = add i8 [[RES2]], [[RES3]]
+; CHECK-OPT-NEXT: ret i8 [[RES23]]
+; CHECK-OPT: [[R2]]:
+; CHECK-OPT-NEXT: [[RES4:%.*]] = extractelement <32 x i8> [[TMP3]], i64 4
+; CHECK-OPT-NEXT: [[RES5:%.*]] = extractelement <32 x i8> [[TMP1]], i64 5
+; CHECK-OPT-NEXT: [[RES45:%.*]] = add i8 [[RES4]], [[RES5]]
+; CHECK-OPT-NEXT: ret i8 [[RES45]]
+; CHECK-OPT: [[R3]]:
+; CHECK-OPT-NEXT: [[RES6:%.*]] = extractelement <32 x i8> [[TMP3]], i64 6
+; CHECK-OPT-NEXT: [[RES7:%.*]] = extractelement <32 x i8> [[TMP1]], i64 7
+; CHECK-OPT-NEXT: [[RES67:%.*]] = add i8 [[RES6]], [[RES7]]
+; CHECK-OPT-NEXT: ret i8 [[RES67]]
+; CHECK-OPT: [[R4]]:
+; CHECK-OPT-NEXT: [[RES8:%.*]] = extractelement <32 x i8> [[TMP3]], i64 8
+; CHECK-OPT-NEXT: [[RES9:%.*]] = extractelement <32 x i8> [[TMP1]], i64 9
+; CHECK-OPT-NEXT: [[RES89:%.*]] = add i8 [[RES8]], [[RES9]]
+; CHECK-OPT-NEXT: ret i8 [[RES89]]
+;
+; CHECK-NOOPT-LABEL: define i8 @fold_selects_from_bitcast_dominance_multiblock3(
+; CHECK-NOOPT-SAME: <4 x i64> [[V1:%.*]], <4 x i64> [[V2:%.*]], i8 [[A:%.*]], i1 [[FLAG1:%.*]], i1 [[FLAG2:%.*]], i1 [[FLAG3:%.*]], i1 [[FLAG4:%.*]], i1 [[COND2:%.*]]) #[[ATTR0]] {
+; CHECK-NOOPT-NEXT: [[ENTRY:.*:]]
+; CHECK-NOOPT-NEXT: [[TMP0:%.*]] = bitcast <4 x i64> [[V1]] to <32 x i8>
+; CHECK-NOOPT-NEXT: [[TMP1:%.*]] = bitcast <4 x i64> [[V2]] to <32 x i8>
+; CHECK-NOOPT-NEXT: br label %[[FIRST:.*]]
+; CHECK-NOOPT: [[FIRST]]:
+; CHECK-NOOPT-NEXT: [[VECEXT00:%.*]] = extractelement <32 x i8> [[TMP0]], i64 0
+; CHECK-NOOPT-NEXT: [[VECEXT02:%.*]] = extractelement <32 x i8> [[TMP0]], i64 2
+; CHECK-NOOPT-NEXT: [[VECEXT04:%.*]] = extractelement <32 x i8> [[TMP0]], i64 4
+; CHECK-NOOPT-NEXT: [[VECEXT06:%.*]] = extractelement <32 x i8> [[TMP0]], i64 6
+; CHECK-NOOPT-NEXT: [[VECEXT08:%.*]] = extractelement <32 x i8> [[TMP0]], i64 8
+; CHECK-NOOPT-NEXT: [[VECEXT11:%.*]] = extractelement <32 x i8> [[TMP1]], i64 1
+; CHECK-NOOPT-NEXT: [[VECEXT13:%.*]] = extractelement <32 x i8> [[TMP1]], i64 3
+; CHECK-NOOPT-NEXT: [[VECEXT15:%.*]] = extractelement <32 x i8> [[TMP1]], i64 5
+; CHECK-NOOPT-NEXT: [[VECEXT17:%.*]] = extractelement <32 x i8> [[TMP1]], i64 7
+; CHECK-NOOPT-NEXT: [[VECEXT19:%.*]] = extractelement <32 x i8> [[TMP1]], i64 9
+; CHECK-NOOPT-NEXT: br label %[[T0:.*]]
+; CHECK-NOOPT: [[T0]]:
+; CHECK-NOOPT-NEXT: [[COND1:%.*]] = icmp eq i8 [[A]], 0
+; CHECK-NOOPT-NEXT: br i1 [[FLAG1]], label %[[R0:.*]], label %[[T1:.*]]
+; CHECK-NOOPT: [[T1]]:
+; CHECK-NOOPT-NEXT: br i1 [[FLAG2]], label %[[R1:.*]], label %[[T2:.*]]
+; CHECK-NOOPT: [[T2]]:
+; CHECK-NOOPT-NEXT: br i1 [[FLAG3]], label %[[R2:.*]], label %[[T3:.*]]
+; CHECK-NOOPT: [[T3]]:
+; CHECK-NOOPT-NEXT: br i1 [[FLAG4]], label %[[R3:.*]], label %[[R4:.*]]
+; CHECK-NOOPT: [[R0]]:
+; CHECK-NOOPT-NEXT: [[RES0:%.*]] = select i1 [[COND1]], i8 [[VECEXT00]], i8 0
+; CHECK-NOOPT-NEXT: [[RES1:%.*]] = select i1 [[COND2]], i8 [[VECEXT11]], i8 0
+; CHECK-NOOPT-NEXT: [[RES01:%.*]] = add i8 [[RES0]], [[RES1]]
+; CHECK-NOOPT-NEXT: ret i8 [[RES01]]
+; CHECK-NOOPT: [[R1]]:
+; CHECK-NOOPT-NEXT: [[RES2:%.*]] = select i1 [[COND1]], i8 [[VECEXT02]], i8 0
+; CHECK-NOOPT-NEXT: [[RES3:%.*]] = select i1 [[COND2]], i8 [[VECEXT13]], i8 0
+; CHECK-NOOPT-NEXT: [[RES23:%.*]] = add i8 [[RES2]], [[RES3]]
+; CHECK-NOOPT-NEXT: ret i8 [[RES23]]
+; CHECK-NOOPT: [[R2]]:
+; CHECK-NOOPT-NEXT: [[RES4:%.*]] = select i1 [[COND1]], i8 [[VECEXT04]], i8 0
+; CHECK-NOOPT-NEXT: [[RES5:%.*]] = select i1 [[COND2]], i8 [[VECEXT15]], i8 0
+; CHECK-NOOPT-NEXT: [[RES45:%.*]] = add i8 [[RES4]], [[RES5]]
+; CHECK-NOOPT-NEXT: ret i8 [[RES45]]
+; CHECK-NOOPT: [[R3]]:
+; CHECK-NOOPT-NEXT: [[RES6:%.*]] = select i1 [[COND1]], i8 [[VECEXT06]], i8 0
+; CHECK-NOOPT-NEXT: [[RES7:%.*]] = select i1 [[COND2]], i8 [[VECEXT17]], i8 0
+; CHECK-NOOPT-NEXT: [[RES67:%.*]] = add i8 [[RES6]], [[RES7]]
+; CHECK-NOOPT-NEXT: ret i8 [[RES67]]
+; CHECK-NOOPT: [[R4]]:
+; CHECK-NOOPT-NEXT: [[RES8:%.*]] = select i1 [[COND1]], i8 [[VECEXT08]], i8 0
+; CHECK-NOOPT-NEXT: [[RES9:%.*]] = select i1 [[COND2]], i8 [[VECEXT19]], i8 0
+; CHECK-NOOPT-NEXT: [[RES89:%.*]] = add i8 [[RES8]], [[RES9]]
+; CHECK-NOOPT-NEXT: ret i8 [[RES89]]
+;
+entry:
+ %0 = bitcast <4 x i64> %v1 to <32 x i8>
+ %1 = bitcast <4 x i64> %v2 to <32 x i8>
+ br label %first
+
+first:
+ %vecext00 = extractelement <32 x i8> %0, i64 0
+ %vecext02 = extractelement <32 x i8> %0, i64 2
+ %vecext04 = extractelement <32 x i8> %0, i64 4
+ %vecext06 = extractelement <32 x i8> %0, i64 6
+ %vecext08 = extractelement <32 x i8> %0, i64 8
+ %vecext11 = extractelement <32 x i8> %1, i64 1
+ %vecext13 = extractelement <32 x i8> %1, i64 3
+ %vecext15 = extractelement <32 x i8> %1, i64 5
+ %vecext17 = extractelement <32 x i8> %1, i64 7
+ %vecext19 = extractelement <32 x i8> %1, i64 9
+ br label %t0
+
+t0:
+ %cond1 = icmp eq i8 %a, 0
+ br i1 %flag1, label %r0, label %t1
+
+t1:
+ br i1 %flag2, label %r1, label %t2
+
+t2:
+ br i1 %flag3, label %r2, label %t3
+
+t3:
+ br i1 %flag4, label %r3, label %r4
+
+r0:
+ %res0 = select i1 %cond1, i8 %vecext00, i8 0
+ %res1 = select i1 %cond2, i8 %vecext11, i8 0
+ %res01 = add i8 %res0, %res1
+ ret i8 %res01
+
+r1:
+ %res2 = select i1 %cond1, i8 %vecext02, i8 0
+ %res3 = select i1 %cond2, i8 %vecext13, i8 0
+ %res23 = add i8 %res2, %res3
+ ret i8 %res23
+
+r2:
+ %res4 = select i1 %cond1, i8 %vecext04, i8 0
+ %res5 = select i1 %cond2, i8 %vecext15, i8 0
+ %res45 = add i8 %res4, %res5
+ ret i8 %res45
+
+r3:
+ %res6 = select i1 %cond1, i8 %vecext06, i8 0
+ %res7 = select i1 %cond2, i8 %vecext17, i8 0
+ %res67 = add i8 %res6, %res7
+ ret i8 %res67
+
+r4:
+ %res8 = select i1 %cond1, i8 %vecext08, i8 0
+ %res9 = select i1 %cond2, i8 %vecext19, i8 0
+ %res89 = add i8 %res8, %res9
+ ret i8 %res89
+}
+
declare <4 x i32> @llvm.amdgcn.raw.buffer.load.v4i32(<4 x i32>, i32, i32, i32 immarg)
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