[llvm] [X86] vectorizeExtractedCast - don't assume vector source type is simple (PR #178414)

via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 28 05:06:39 PST 2026


llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-x86

Author: Simon Pilgrim (RKSimon)

<details>
<summary>Changes</summary>

Fixes #<!-- -->178410

---
Full diff: https://github.com/llvm/llvm-project/pull/178414.diff


2 Files Affected:

- (modified) llvm/lib/Target/X86/X86ISelLowering.cpp (+2-2) 
- (added) llvm/test/CodeGen/X86/pr178410.ll (+38) 


``````````diff
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 1b3e0148262d6..5df7d4689fab2 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -20185,9 +20185,9 @@ static SDValue vectorizeExtractedCast(SDValue Cast, const SDLoc &DL,
 
   // See if we have a 128-bit vector cast op for this type of cast.
   SDValue VecOp = Extract.getOperand(0);
-  MVT FromVT = VecOp.getSimpleValueType();
+  EVT FromVT = VecOp.getValueType();
   unsigned NumEltsInXMM = 128 / FromVT.getScalarSizeInBits();
-  MVT Vec128VT = MVT::getVectorVT(FromVT.getScalarType(), NumEltsInXMM);
+  MVT Vec128VT = MVT::getVectorVT(FromVT.getScalarType().getSimpleVT(), NumEltsInXMM);
   MVT ToVT = MVT::getVectorVT(DestVT, NumEltsInXMM);
   if (!useVectorCast(Cast.getOpcode(), Vec128VT, ToVT, Subtarget))
     return SDValue();
diff --git a/llvm/test/CodeGen/X86/pr178410.ll b/llvm/test/CodeGen/X86/pr178410.ll
new file mode 100644
index 0000000000000..09be5428001e6
--- /dev/null
+++ b/llvm/test/CodeGen/X86/pr178410.ll
@@ -0,0 +1,38 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64    | FileCheck %s --check-prefixes=SSE
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX
+
+define float @PR178410(ptr %p0) nounwind {
+; X86-LABEL: PR178410:
+; X86:       # %bb.0:
+; X86-NEXT:    pushl %ebp
+; X86-NEXT:    movl %esp, %ebp
+; X86-NEXT:    andl $-8, %esp
+; X86-NEXT:    subl $8, %esp
+; X86-NEXT:    movl 8(%ebp), %eax
+; X86-NEXT:    movl (%eax), %ecx
+; X86-NEXT:    movl 4(%eax), %eax
+; X86-NEXT:    movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT:    movl %ecx, (%esp)
+; X86-NEXT:    fildll (%esp)
+; X86-NEXT:    movl %ebp, %esp
+; X86-NEXT:    popl %ebp
+; X86-NEXT:    retl
+;
+; SSE-LABEL: PR178410:
+; SSE:       # %bb.0:
+; SSE-NEXT:    cvtsi2ssq (%rdi), %xmm0
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: PR178410:
+; AVX:       # %bb.0:
+; AVX-NEXT:    vcvtsi2ssq (%rdi), %xmm15, %xmm0
+; AVX-NEXT:    retq
+  %load = load <13 x i64>, ptr %p0, align 8
+  %elt = extractelement <13 x i64> %load, i64 0
+  %cvt = sitofp i64 %elt to float
+  ret float %cvt
+}

``````````

</details>


https://github.com/llvm/llvm-project/pull/178414


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