[llvm] [LSR] Add unequal cost eval for dropping solutions (PR #178039)

Michael Berg via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 27 19:01:24 PST 2026


================
@@ -53,24 +53,26 @@ define void @test(i32 signext %row, i32 signext %N.in) nounwind {
 ; RV64:       # %bb.0: # %entry
 ; RV64-NEXT:    blez a1, .LBB0_3
 ; RV64-NEXT:  # %bb.1: # %cond_true.preheader
-; RV64-NEXT:    slli a3, a0, 6
-; RV64-NEXT:    lui a4, %hi(A)
-; RV64-NEXT:    addi a4, a4, %lo(A)
-; RV64-NEXT:    addiw a1, a1, 2
+; RV64-NEXT:    neg a1, a1
+; RV64-NEXT:    slli a4, a0, 6
+; RV64-NEXT:    lui a5, %hi(A)
+; RV64-NEXT:    addi a5, a5, %lo(A)
 ; RV64-NEXT:    li a0, 2
 ; RV64-NEXT:    li a2, 4
-; RV64-NEXT:    add a3, a3, a4
-; RV64-NEXT:    addi a4, a3, 4
-; RV64-NEXT:    li a5, 5
+; RV64-NEXT:    li a3, 5
+; RV64-NEXT:    add a4, a4, a5
+; RV64-NEXT:    addi a5, a4, 4
+; RV64-NEXT:    li a6, 2
 ; RV64-NEXT:  .LBB0_2: # %cond_true
 ; RV64-NEXT:    # =>This Inner Loop Header: Depth=1
-; RV64-NEXT:    sw a2, 0(a4)
-; RV64-NEXT:    slli a6, a0, 2
-; RV64-NEXT:    addiw a0, a0, 1
-; RV64-NEXT:    add a6, a3, a6
-; RV64-NEXT:    sw a5, 0(a6)
-; RV64-NEXT:    addi a4, a4, 4
-; RV64-NEXT:    bne a0, a1, .LBB0_2
+; RV64-NEXT:    sw a2, 0(a5)
+; RV64-NEXT:    slli a7, a6, 2
+; RV64-NEXT:    addiw a6, a6, 1
+; RV64-NEXT:    add a7, a4, a7
+; RV64-NEXT:    sw a3, 0(a7)
+; RV64-NEXT:    addw a7, a1, a6
+; RV64-NEXT:    addi a5, a5, 4
+; RV64-NEXT:    bne a7, a0, .LBB0_2
----------------
mcberg2021 wrote:

This is the case where we loose loop term fold opportunity.  I'll create a downstream issue to see if we can extend support to obtain the fold.

https://github.com/llvm/llvm-project/pull/178039


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