[llvm] [AMDGPU] Introduce V_READANYLANE_B32 (PR #178312)

[Sameer Sahasrabuddhe via llvm-commits]

ssahasra wrote:

> > Nice.
> > Though conceptually, this pseudo should be convergent. Moving the instruction in a way where additional lanes participate could change the value.
> 
> For uniform input it does not.

I am not sure how this answers what @nhaehnle pointed out. "readanylane" says that at this point in the control flow, the input is uniform, so just pick one. If the same intrinsic gets hoisted above a divergent branch, this is no longer true.

Also, the name of the instruction does not seem to convey the correct semantics. To me, "readanylane" would mean "I don't care about uniformity". If that is true, then yes, it's okay to hoist this above a divergent branch.

Is this related to #115696?

https://github.com/llvm/llvm-project/pull/178312