[llvm] 72147b4 - [RISCV] Remove RVInstV2. NFC (#177901)

[via llvm-commits]

Author: Craig Topper
Date: 2026-01-27T11:53:03-08:00
New Revision: 72147b4f61c52e095aab2cab3423d1c4161bd9d8

URL: https://github.com/llvm/llvm-project/commit/72147b4f61c52e095aab2cab3423d1c4161bd9d8
DIFF: https://github.com/llvm/llvm-project/commit/72147b4f61c52e095aab2cab3423d1c4161bd9d8.diff

LOG: [RISCV] Remove RVInstV2. NFC (#177901)

It only as 2 users and RVInstV2 isn't a good name. We can use RVInstVX
and set vs2 to 0 at the definition.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrFormatsV.td
    llvm/lib/Target/RISCV/RISCVInstrInfoV.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVInstrFormatsV.td b/llvm/lib/Target/RISCV/RISCVInstrFormatsV.td
index 86c8cb8f2cfe7..b912e379580a1 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrFormatsV.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrFormatsV.td
@@ -120,15 +120,6 @@ class RVInstVX<bits<6> funct6, RISCVVFormat opv, dag outs, dag ins,
   let Inst{19-15} = rs1;
 }
 
-class RVInstV2<bits<6> funct6, bits<5> vs2, RISCVVFormat opv, dag outs, dag ins,
-                string opcodestr, string argstr>
-    : RVInstVBase<funct6, opv, outs, ins, opcodestr, argstr> {
-  bits<5> rs1;
-
-  let Inst{24-20} = vs2;
-  let Inst{19-15} = rs1;
-}
-
 class RVInstIVI<bits<6> funct6, dag outs, dag ins, string opcodestr,
                 string argstr>
     : RVInstVBase<funct6, OPIVI, outs, ins, opcodestr, argstr> {

diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoV.td b/llvm/lib/Target/RISCV/RISCVInstrInfoV.td
index a4a47be15e11e..e674a48957b43 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoV.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoV.td
@@ -1686,11 +1686,15 @@ def VMV_X_S : RVInstVUnaryRd<0b010000, 0b00000, OPMVV, (outs GPR:$rd),
               Sched<[WriteVMovXS, ReadVMovXS]> {
   let Uses = [VTYPE];
 }
-let RVVConstraint = NoConstraint, Constraints = "$vd = $vd_wb" in
-def VMV_S_X : RVInstV2<0b010000, 0b00000, OPMVX, (outs VR:$vd_wb),
+def VMV_S_X : RVInstVX<0b010000, OPMVX, (outs VR:$vd_wb),
                       (ins VR:$vd, GPR:$rs1), "vmv.s.x", "$vd, $rs1">,
-              Sched<[WriteVMovSX, ReadVMovSX_V, ReadVMovSX_X]>;
+              Sched<[WriteVMovSX, ReadVMovSX_V, ReadVMovSX_X]> {
+  let vs2 = 0;
+
+  let Constraints = "$vd = $vd_wb";
+  let RVVConstraint = NoConstraint;
 }
+} // vm = 1
 
 } // hasSideEffects = 0, mayLoad = 0, mayStore = 0
 
@@ -1705,10 +1709,14 @@ def VFMV_F_S : RVInstVUnaryRd<0b010000, 0b00000, OPFVV, (outs FPR32:$rd),
                Sched<[WriteVMovFS, ReadVMovFS]> {
   let Uses = [VTYPE];
 }
-let RVVConstraint = NoConstraint, Constraints = "$vd = $vd_wb" in
-def VFMV_S_F : RVInstV2<0b010000, 0b00000, OPFVF, (outs VR:$vd_wb),
+def VFMV_S_F : RVInstVX<0b010000, OPFVF, (outs VR:$vd_wb),
                        (ins VR:$vd, FPR32:$rs1), "vfmv.s.f", "$vd, $rs1">,
-               Sched<[WriteVMovSF, ReadVMovSF_V, ReadVMovSF_F]>;
+               Sched<[WriteVMovSF, ReadVMovSF_V, ReadVMovSF_F]> {
+  let vs2 = 0;
+
+  let Constraints = "$vd = $vd_wb";
+  let RVVConstraint = NoConstraint;
+}
 
 } // hasSideEffects = 0, mayLoad = 0, mayStore = 0, vm = 1