[llvm] [AMDGPU][SILoadStoreOptimizer] Fix unused variable warning (PR #177969)

[Walter Lee via llvm-commits]

https://github.com/googlewalt updated https://github.com/llvm/llvm-project/pull/177969

>From aa4a6ca05eb8498dc56a6ed7c949b73aba83f024 Mon Sep 17 00:00:00 2001
From: Walter Lee <waltl at google.com>
Date: Mon, 26 Jan 2026 09:41:23 -0500
Subject: [PATCH 1/2] [AMDGPU][SILoadStoreOptimizer] Fix unused variable
 warning in SILoadStoreOptimizer.cpp

Fixes #176816 (13b20e7aeab83e82368be9ffd22ce02cb9b831ae).
---
 llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp b/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
index a3c5fb2fa6ca0..bbee86c603cd2 100644
--- a/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
@@ -2282,8 +2282,8 @@ bool SILoadStoreOptimizer::processBaseWithConstOffset64(
   }
 
   // Now extract the base register (which should be a 64-bit VGPR).
-  MachineInstr *BaseDef = MRI->getVRegDef(BaseOp->getReg());
-  assert(BaseDef && "Expected definition for base register");
+  assert(MRI->getVRegDef(BaseOp->getReg()) &&
+         "Expected definition for base register");
   Addr.Base.LoReg = BaseOp->getReg();
   Addr.Base.UseV64Pattern = true;
   return true;

>From 56553f7343a80cadda512c847c2227e904d21591 Mon Sep 17 00:00:00 2001
From: Walter Lee <waltl at google.com>
Date: Mon, 26 Jan 2026 10:06:45 -0500
Subject: [PATCH 2/2] From review, can just delete the whole assert, this isn't
 querying the def anymore.

---
 llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 2 --
 1 file changed, 2 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp b/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
index bbee86c603cd2..594c35a1dee3b 100644
--- a/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
@@ -2282,8 +2282,6 @@ bool SILoadStoreOptimizer::processBaseWithConstOffset64(
   }
 
   // Now extract the base register (which should be a 64-bit VGPR).
-  assert(MRI->getVRegDef(BaseOp->getReg()) &&
-         "Expected definition for base register");
   Addr.Base.LoReg = BaseOp->getReg();
   Addr.Base.UseV64Pattern = true;
   return true;