[llvm] [DAGCombiner] Fix exact power-of-two signed division for large integers (PR #177340)

[Steffen Larsen via llvm-commits]

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@@ -5232,12 +5232,16 @@ SDValue DAGCombiner::visitSDIVLike(SDValue N0, SDValue N1, SDNode *N) {
   EVT VT = N->getValueType(0);
   EVT CCVT = getSetCCResultType(VT);
   unsigned BitWidth = VT.getScalarSizeInBits();
+  unsigned MaxLegalDivRemBitWidth = TLI.getMaxDivRemBitWidthSupported();
 
   // fold (sdiv X, pow2) -> simple ops after legalize
   // FIXME: We check for the exact bit here because the generic lowering gives
   // better results in that case. The target-specific lowering should learn how
-  // to handle exact sdivs efficiently.
-  if (!N->getFlags().hasExact() && isDivisorPowerOfTwo(N1)) {
+  // to handle exact sdivs efficiently. An exception is made for large bitwidths
+  // exceeding what the target can natively support, as division expansion was
+  // skipped in favor of this optimization.
+  if ((!N->getFlags().hasExact() || BitWidth > MaxLegalDivRemBitWidth) &&
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steffenlarsen wrote:

Though I hate to propagate the hack, this is the condition that makes the IR expansion skip these. Though it wouldn't be any less of a hack, it could be moved to a more aptly named function, but it would just be obfuscating the hack.

https://github.com/llvm/llvm-project/pull/177340