[llvm] [AMDGPU] Analyze REG_SEQUENCE To Remove Redundant CMP Instructions (PR #167364)

[Matt Arsenault via llvm-commits]

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@@ -1313,6 +1313,34 @@ Register SIInstrInfo::insertNE(MachineBasicBlock *MBB,
   return Reg;
 }
 
+MachineInstr *
+SIInstrInfo::pierceThroughRegSequence(const MachineInstr &MI) const {
+  if (MI.getOpcode() != AMDGPU::REG_SEQUENCE || MI.getNumOperands() != 5)
+    return nullptr;
+
+  const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
+  int64_t SubRegValues[2];
+  bool SubRegIsConst[2];
+  MachineInstr *RealDefs[2];
+  for (unsigned I : {2, 4}) {
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arsenm wrote:

I think writing these as loops is making this harder to follow for how narrow the case you're trying to handle is.



https://github.com/llvm/llvm-project/pull/167364