[llvm] [KnownBits][SelectionDAG] Add KnownBits::clmul. Support trailing bits. NFC (PR #177517)

[Craig Topper via llvm-commits]

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@@ -602,6 +602,41 @@ KnownBits KnownBits::ashr(const KnownBits &LHS, const KnownBits &RHS,
   return Known;
 }
 
+KnownBits KnownBits::clmul(const KnownBits &LHS, const KnownBits &RHS) {
+  unsigned BitWidth = LHS.getBitWidth();
+
+  // An m*n result will always fit in m+n-1 bits since there are no carries.
+  unsigned ActiveBits = std::min(
+      BitWidth, LHS.countMaxActiveBits() + RHS.countMaxActiveBits() - 1);
+
+  // The result of the bottom bits of a clmul can be inferred by looking at the
+  // bottom bits of both operands and carryless multiplying them together. The
+  // number of bits we can determine follows the same logic as KnownBits::mul.
+  const APInt &Bottom0 = LHS.One;
+  const APInt &Bottom1 = RHS.One;
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topperc wrote:

This code was copied exactly from KnownBits::mul. Should we fix both?

https://github.com/llvm/llvm-project/pull/177517