[llvm] [AMDGPU] Add folding ISD::SELECT from vXiY into vZi32 with X * Y = Z * 32 (PR #173328)

[Matt Arsenault via llvm-commits]

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@@ -17077,6 +17073,48 @@ SDValue SITargetLowering::performSelectCombine(SDNode *N,
                          SelectLHS, SelectRHS);
 }
 
+// Try to convert vXiY into vZi32 with X * Y = Z * 32
+SDValue SITargetLowering::castTypeSelect(SDNode *N, DAGCombinerInfo &DCI,
+                                         SDValue Cond, SDValue TrueVal,
+                                         SDValue FalseVal) const {
+  EVT ResultVT = N->getValueType(0);
+  if (ResultVT.isSimple() || !ResultVT.isVector() ||
+      !ResultVT.isPow2VectorType())
+    return SDValue();
+
+  EVT EltVT = ResultVT.getVectorElementType();
+  unsigned EltBitSize = EltVT.getSizeInBits();
+  if (!EltVT.isInteger() || ResultVT.getVectorElementCount().isScalar())
+    return SDValue();
+
+  unsigned NewNumElts = ResultVT.getVectorNumElements() / (32 / EltBitSize);
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arsenm wrote:

Instead of hardcoding i32, should do it in terms of getLegalTypeToTransformTo or getTypeToExpandTo? 

https://github.com/llvm/llvm-project/pull/173328