[llvm] [X86] Add 256-bit and 512-bit CLMULR and CLMULH test coverage (PR #177561)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 23 02:13:44 PST 2026
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-x86
Author: Simon Pilgrim (RKSimon)
<details>
<summary>Changes</summary>
---
Patch is 178.47 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/177561.diff
2 Files Affected:
- (modified) llvm/test/CodeGen/X86/clmul-vector-256.ll (+1844)
- (modified) llvm/test/CodeGen/X86/clmul-vector-512.ll (+1595-3)
``````````diff
diff --git a/llvm/test/CodeGen/X86/clmul-vector-256.ll b/llvm/test/CodeGen/X86/clmul-vector-256.ll
index b020704b63a5b..303aeeae3f5df 100644
--- a/llvm/test/CodeGen/X86/clmul-vector-256.ll
+++ b/llvm/test/CodeGen/X86/clmul-vector-256.ll
@@ -608,3 +608,1847 @@ define <4 x i64> @clmul_v4i64(<4 x i64> %a, <4 x i64> %b) nounwind {
%res = call <4 x i64> @llvm.clmul.v4i64(<4 x i64> %a, <4 x i64> %b)
ret <4 x i64> %res
}
+
+define <32 x i8> @clmulr_v32i8(<32 x i8> %a, <32 x i8> %b) nounwind {
+; AVX1-LABEL: clmulr_v32i8:
+; AVX1: # %bb.0:
+; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4
+; AVX1-NEXT: vbroadcastss {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; AVX1-NEXT: vpand %xmm2, %xmm4, %xmm5
+; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [0,128,64,192,32,160,96,224,16,144,80,208,48,176,112,240]
+; AVX1-NEXT: vpshufb %xmm5, %xmm3, %xmm5
+; AVX1-NEXT: vpsrlw $4, %xmm4, %xmm4
+; AVX1-NEXT: vpand %xmm2, %xmm4, %xmm6
+; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [0,8,4,12,2,10,6,14,1,9,5,13,3,11,7,15]
+; AVX1-NEXT: vpshufb %xmm6, %xmm4, %xmm6
+; AVX1-NEXT: vpor %xmm6, %xmm5, %xmm5
+; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm6
+; AVX1-NEXT: vpshufb %xmm6, %xmm3, %xmm6
+; AVX1-NEXT: vpsrlw $4, %xmm1, %xmm1
+; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm1
+; AVX1-NEXT: vpshufb %xmm1, %xmm4, %xmm1
+; AVX1-NEXT: vpor %xmm1, %xmm6, %xmm1
+; AVX1-NEXT: vinsertf128 $1, %xmm5, %ymm1, %ymm5
+; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm5, %ymm8
+; AVX1-NEXT: vextractf128 $1, %ymm8, %xmm9
+; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
+; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm6
+; AVX1-NEXT: vpshufb %xmm6, %xmm3, %xmm6
+; AVX1-NEXT: vpsrlw $4, %xmm1, %xmm1
+; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm1
+; AVX1-NEXT: vpshufb %xmm1, %xmm4, %xmm1
+; AVX1-NEXT: vpor %xmm1, %xmm6, %xmm1
+; AVX1-NEXT: vpmullw %xmm1, %xmm9, %xmm6
+; AVX1-NEXT: vpand %xmm2, %xmm0, %xmm7
+; AVX1-NEXT: vpshufb %xmm7, %xmm3, %xmm7
+; AVX1-NEXT: vpsrlw $4, %xmm0, %xmm0
+; AVX1-NEXT: vpand %xmm2, %xmm0, %xmm0
+; AVX1-NEXT: vpshufb %xmm0, %xmm4, %xmm0
+; AVX1-NEXT: vpor %xmm0, %xmm7, %xmm0
+; AVX1-NEXT: vpmullw %xmm0, %xmm8, %xmm7
+; AVX1-NEXT: vinsertf128 $1, %xmm6, %ymm7, %ymm6
+; AVX1-NEXT: vbroadcastf128 {{.*#+}} ymm7 = [255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0]
+; AVX1-NEXT: # ymm7 = mem[0,1,0,1]
+; AVX1-NEXT: vandps %ymm7, %ymm6, %ymm10
+; AVX1-NEXT: vbroadcastss {{.*#+}} ymm6 = [255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0]
+; AVX1-NEXT: vpandn %xmm8, %xmm6, %xmm8
+; AVX1-NEXT: vpmaddubsw %xmm8, %xmm0, %xmm8
+; AVX1-NEXT: vpsllw $8, %xmm8, %xmm8
+; AVX1-NEXT: vpandn %xmm9, %xmm6, %xmm9
+; AVX1-NEXT: vpmaddubsw %xmm9, %xmm1, %xmm9
+; AVX1-NEXT: vpsllw $8, %xmm9, %xmm9
+; AVX1-NEXT: vinsertf128 $1, %xmm9, %ymm8, %ymm8
+; AVX1-NEXT: vorps %ymm8, %ymm10, %ymm8
+; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm5, %ymm9
+; AVX1-NEXT: vextractf128 $1, %ymm9, %xmm10
+; AVX1-NEXT: vpmullw %xmm1, %xmm10, %xmm11
+; AVX1-NEXT: vpmullw %xmm0, %xmm9, %xmm12
+; AVX1-NEXT: vinsertf128 $1, %xmm11, %ymm12, %ymm11
+; AVX1-NEXT: vandps %ymm7, %ymm11, %ymm11
+; AVX1-NEXT: vpandn %xmm9, %xmm6, %xmm9
+; AVX1-NEXT: vpmaddubsw %xmm9, %xmm0, %xmm9
+; AVX1-NEXT: vpsllw $8, %xmm9, %xmm9
+; AVX1-NEXT: vpandn %xmm10, %xmm6, %xmm10
+; AVX1-NEXT: vpmaddubsw %xmm10, %xmm1, %xmm10
+; AVX1-NEXT: vpsllw $8, %xmm10, %xmm10
+; AVX1-NEXT: vinsertf128 $1, %xmm10, %ymm9, %ymm9
+; AVX1-NEXT: vorps %ymm9, %ymm11, %ymm9
+; AVX1-NEXT: vxorps %ymm8, %ymm9, %ymm8
+; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm5, %ymm9
+; AVX1-NEXT: vextractf128 $1, %ymm9, %xmm10
+; AVX1-NEXT: vpmullw %xmm1, %xmm10, %xmm11
+; AVX1-NEXT: vpmullw %xmm0, %xmm9, %xmm12
+; AVX1-NEXT: vinsertf128 $1, %xmm11, %ymm12, %ymm11
+; AVX1-NEXT: vandps %ymm7, %ymm11, %ymm11
+; AVX1-NEXT: vpandn %xmm9, %xmm6, %xmm9
+; AVX1-NEXT: vpmaddubsw %xmm9, %xmm0, %xmm9
+; AVX1-NEXT: vpsllw $8, %xmm9, %xmm9
+; AVX1-NEXT: vpandn %xmm10, %xmm6, %xmm10
+; AVX1-NEXT: vpmaddubsw %xmm10, %xmm1, %xmm10
+; AVX1-NEXT: vpsllw $8, %xmm10, %xmm10
+; AVX1-NEXT: vinsertf128 $1, %xmm10, %ymm9, %ymm9
+; AVX1-NEXT: vorps %ymm9, %ymm11, %ymm9
+; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm5, %ymm10
+; AVX1-NEXT: vextractf128 $1, %ymm10, %xmm11
+; AVX1-NEXT: vpmullw %xmm1, %xmm11, %xmm12
+; AVX1-NEXT: vpmullw %xmm0, %xmm10, %xmm13
+; AVX1-NEXT: vinsertf128 $1, %xmm12, %ymm13, %ymm12
+; AVX1-NEXT: vandps %ymm7, %ymm12, %ymm12
+; AVX1-NEXT: vpandn %xmm10, %xmm6, %xmm10
+; AVX1-NEXT: vpmaddubsw %xmm10, %xmm0, %xmm10
+; AVX1-NEXT: vpsllw $8, %xmm10, %xmm10
+; AVX1-NEXT: vpandn %xmm11, %xmm6, %xmm11
+; AVX1-NEXT: vpmaddubsw %xmm11, %xmm1, %xmm11
+; AVX1-NEXT: vpsllw $8, %xmm11, %xmm11
+; AVX1-NEXT: vinsertf128 $1, %xmm11, %ymm10, %ymm10
+; AVX1-NEXT: vorps %ymm10, %ymm12, %ymm10
+; AVX1-NEXT: vxorps %ymm10, %ymm9, %ymm9
+; AVX1-NEXT: vxorps %ymm9, %ymm8, %ymm8
+; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm5, %ymm9
+; AVX1-NEXT: vextractf128 $1, %ymm9, %xmm10
+; AVX1-NEXT: vpmullw %xmm1, %xmm10, %xmm11
+; AVX1-NEXT: vpmullw %xmm0, %xmm9, %xmm12
+; AVX1-NEXT: vinsertf128 $1, %xmm11, %ymm12, %ymm11
+; AVX1-NEXT: vandps %ymm7, %ymm11, %ymm11
+; AVX1-NEXT: vpandn %xmm9, %xmm6, %xmm9
+; AVX1-NEXT: vpmaddubsw %xmm9, %xmm0, %xmm9
+; AVX1-NEXT: vpsllw $8, %xmm9, %xmm9
+; AVX1-NEXT: vpandn %xmm10, %xmm6, %xmm10
+; AVX1-NEXT: vpmaddubsw %xmm10, %xmm1, %xmm10
+; AVX1-NEXT: vpsllw $8, %xmm10, %xmm10
+; AVX1-NEXT: vinsertf128 $1, %xmm10, %ymm9, %ymm9
+; AVX1-NEXT: vorps %ymm9, %ymm11, %ymm9
+; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm5, %ymm10
+; AVX1-NEXT: vextractf128 $1, %ymm10, %xmm11
+; AVX1-NEXT: vpmullw %xmm1, %xmm11, %xmm12
+; AVX1-NEXT: vpmullw %xmm0, %xmm10, %xmm13
+; AVX1-NEXT: vinsertf128 $1, %xmm12, %ymm13, %ymm12
+; AVX1-NEXT: vandps %ymm7, %ymm12, %ymm12
+; AVX1-NEXT: vpandn %xmm10, %xmm6, %xmm10
+; AVX1-NEXT: vpmaddubsw %xmm10, %xmm0, %xmm10
+; AVX1-NEXT: vpsllw $8, %xmm10, %xmm10
+; AVX1-NEXT: vpandn %xmm11, %xmm6, %xmm11
+; AVX1-NEXT: vpmaddubsw %xmm11, %xmm1, %xmm11
+; AVX1-NEXT: vpsllw $8, %xmm11, %xmm11
+; AVX1-NEXT: vinsertf128 $1, %xmm11, %ymm10, %ymm10
+; AVX1-NEXT: vorps %ymm10, %ymm12, %ymm10
+; AVX1-NEXT: vxorps %ymm10, %ymm9, %ymm9
+; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm5, %ymm10
+; AVX1-NEXT: vextractf128 $1, %ymm10, %xmm11
+; AVX1-NEXT: vpmullw %xmm1, %xmm11, %xmm12
+; AVX1-NEXT: vpmullw %xmm0, %xmm10, %xmm13
+; AVX1-NEXT: vinsertf128 $1, %xmm12, %ymm13, %ymm12
+; AVX1-NEXT: vandps %ymm7, %ymm12, %ymm7
+; AVX1-NEXT: vpandn %xmm10, %xmm6, %xmm10
+; AVX1-NEXT: vpmaddubsw %xmm10, %xmm0, %xmm10
+; AVX1-NEXT: vpsllw $8, %xmm10, %xmm10
+; AVX1-NEXT: vpandn %xmm11, %xmm6, %xmm11
+; AVX1-NEXT: vpmaddubsw %xmm11, %xmm1, %xmm11
+; AVX1-NEXT: vpsllw $8, %xmm11, %xmm11
+; AVX1-NEXT: vinsertf128 $1, %xmm11, %ymm10, %ymm10
+; AVX1-NEXT: vorps %ymm7, %ymm10, %ymm7
+; AVX1-NEXT: vxorps %ymm7, %ymm9, %ymm7
+; AVX1-NEXT: vxorps %ymm7, %ymm8, %ymm7
+; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm5, %ymm5
+; AVX1-NEXT: vextractf128 $1, %ymm5, %xmm8
+; AVX1-NEXT: vpmullw %xmm1, %xmm8, %xmm9
+; AVX1-NEXT: vpmullw %xmm5, %xmm0, %xmm10
+; AVX1-NEXT: vinsertf128 $1, %xmm9, %ymm10, %ymm9
+; AVX1-NEXT: vandps %ymm6, %ymm9, %ymm9
+; AVX1-NEXT: vpandn %xmm5, %xmm6, %xmm5
+; AVX1-NEXT: vpmaddubsw %xmm5, %xmm0, %xmm0
+; AVX1-NEXT: vpsllw $8, %xmm0, %xmm0
+; AVX1-NEXT: vpandn %xmm8, %xmm6, %xmm5
+; AVX1-NEXT: vpmaddubsw %xmm5, %xmm1, %xmm1
+; AVX1-NEXT: vpsllw $8, %xmm1, %xmm1
+; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
+; AVX1-NEXT: vorps %ymm0, %ymm9, %ymm0
+; AVX1-NEXT: vxorps %ymm0, %ymm7, %ymm0
+; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
+; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm5
+; AVX1-NEXT: vpshufb %xmm5, %xmm3, %xmm5
+; AVX1-NEXT: vpsrlw $4, %xmm1, %xmm1
+; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm1
+; AVX1-NEXT: vpshufb %xmm1, %xmm4, %xmm1
+; AVX1-NEXT: vpor %xmm1, %xmm5, %xmm1
+; AVX1-NEXT: vpand %xmm2, %xmm0, %xmm5
+; AVX1-NEXT: vpshufb %xmm5, %xmm3, %xmm3
+; AVX1-NEXT: vpsrlw $4, %xmm0, %xmm0
+; AVX1-NEXT: vpand %xmm2, %xmm0, %xmm0
+; AVX1-NEXT: vpshufb %xmm0, %xmm4, %xmm0
+; AVX1-NEXT: vpor %xmm0, %xmm3, %xmm0
+; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: clmulr_v32i8:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpbroadcastb {{.*#+}} ymm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm4
+; AVX2-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [0,128,64,192,32,160,96,224,16,144,80,208,48,176,112,240,0,128,64,192,32,160,96,224,16,144,80,208,48,176,112,240]
+; AVX2-NEXT: # ymm3 = mem[0,1,0,1]
+; AVX2-NEXT: vpshufb %ymm4, %ymm3, %ymm4
+; AVX2-NEXT: vpsrlw $4, %ymm0, %ymm0
+; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm5
+; AVX2-NEXT: vbroadcasti128 {{.*#+}} ymm0 = [0,8,4,12,2,10,6,14,1,9,5,13,3,11,7,15,0,8,4,12,2,10,6,14,1,9,5,13,3,11,7,15]
+; AVX2-NEXT: # ymm0 = mem[0,1,0,1]
+; AVX2-NEXT: vpshufb %ymm5, %ymm0, %ymm5
+; AVX2-NEXT: vpor %ymm5, %ymm4, %ymm4
+; AVX2-NEXT: vpsrlw $4, %ymm1, %ymm5
+; AVX2-NEXT: vpand %ymm2, %ymm5, %ymm5
+; AVX2-NEXT: vpshufb %ymm5, %ymm0, %ymm6
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm6, %ymm7
+; AVX2-NEXT: vpmullw %ymm7, %ymm4, %ymm8
+; AVX2-NEXT: vpbroadcastw {{.*#+}} ymm5 = [255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255]
+; AVX2-NEXT: vpand %ymm5, %ymm8, %ymm8
+; AVX2-NEXT: vpandn %ymm7, %ymm5, %ymm7
+; AVX2-NEXT: vpmaddubsw %ymm7, %ymm4, %ymm7
+; AVX2-NEXT: vpsllw $8, %ymm7, %ymm7
+; AVX2-NEXT: vpor %ymm7, %ymm8, %ymm7
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm6, %ymm8
+; AVX2-NEXT: vpmullw %ymm4, %ymm8, %ymm9
+; AVX2-NEXT: vpand %ymm5, %ymm9, %ymm9
+; AVX2-NEXT: vpandn %ymm8, %ymm5, %ymm8
+; AVX2-NEXT: vpmaddubsw %ymm8, %ymm4, %ymm8
+; AVX2-NEXT: vpsllw $8, %ymm8, %ymm8
+; AVX2-NEXT: vpor %ymm8, %ymm9, %ymm8
+; AVX2-NEXT: vpxor %ymm7, %ymm8, %ymm7
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm6, %ymm8
+; AVX2-NEXT: vpmullw %ymm4, %ymm8, %ymm9
+; AVX2-NEXT: vpand %ymm5, %ymm9, %ymm9
+; AVX2-NEXT: vpandn %ymm8, %ymm5, %ymm8
+; AVX2-NEXT: vpmaddubsw %ymm8, %ymm4, %ymm8
+; AVX2-NEXT: vpsllw $8, %ymm8, %ymm8
+; AVX2-NEXT: vpor %ymm8, %ymm9, %ymm8
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm6, %ymm6
+; AVX2-NEXT: vpmullw %ymm6, %ymm4, %ymm9
+; AVX2-NEXT: vpand %ymm5, %ymm9, %ymm9
+; AVX2-NEXT: vpandn %ymm6, %ymm5, %ymm6
+; AVX2-NEXT: vpmaddubsw %ymm6, %ymm4, %ymm6
+; AVX2-NEXT: vpsllw $8, %ymm6, %ymm6
+; AVX2-NEXT: vpor %ymm6, %ymm9, %ymm6
+; AVX2-NEXT: vpxor %ymm6, %ymm8, %ymm6
+; AVX2-NEXT: vpxor %ymm6, %ymm7, %ymm6
+; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm1
+; AVX2-NEXT: vpshufb %ymm1, %ymm3, %ymm1
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm7
+; AVX2-NEXT: vpmullw %ymm7, %ymm4, %ymm8
+; AVX2-NEXT: vpand %ymm5, %ymm8, %ymm8
+; AVX2-NEXT: vpandn %ymm7, %ymm5, %ymm7
+; AVX2-NEXT: vpmaddubsw %ymm7, %ymm4, %ymm7
+; AVX2-NEXT: vpsllw $8, %ymm7, %ymm7
+; AVX2-NEXT: vpor %ymm7, %ymm8, %ymm7
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm8
+; AVX2-NEXT: vpmullw %ymm4, %ymm8, %ymm9
+; AVX2-NEXT: vpand %ymm5, %ymm9, %ymm9
+; AVX2-NEXT: vpandn %ymm8, %ymm5, %ymm8
+; AVX2-NEXT: vpmaddubsw %ymm8, %ymm4, %ymm8
+; AVX2-NEXT: vpsllw $8, %ymm8, %ymm8
+; AVX2-NEXT: vpor %ymm8, %ymm9, %ymm8
+; AVX2-NEXT: vpxor %ymm7, %ymm8, %ymm7
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm8
+; AVX2-NEXT: vpmullw %ymm4, %ymm8, %ymm9
+; AVX2-NEXT: vpand %ymm5, %ymm9, %ymm9
+; AVX2-NEXT: vpandn %ymm8, %ymm5, %ymm8
+; AVX2-NEXT: vpmaddubsw %ymm8, %ymm4, %ymm8
+; AVX2-NEXT: vpsllw $8, %ymm8, %ymm8
+; AVX2-NEXT: vpor %ymm8, %ymm9, %ymm8
+; AVX2-NEXT: vpxor %ymm7, %ymm8, %ymm7
+; AVX2-NEXT: vpxor %ymm7, %ymm6, %ymm6
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1
+; AVX2-NEXT: vpmullw %ymm1, %ymm4, %ymm7
+; AVX2-NEXT: vpand %ymm5, %ymm7, %ymm7
+; AVX2-NEXT: vpandn %ymm1, %ymm5, %ymm1
+; AVX2-NEXT: vpmaddubsw %ymm1, %ymm4, %ymm1
+; AVX2-NEXT: vpsllw $8, %ymm1, %ymm1
+; AVX2-NEXT: vpor %ymm1, %ymm7, %ymm1
+; AVX2-NEXT: vpxor %ymm1, %ymm6, %ymm1
+; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm4
+; AVX2-NEXT: vpshufb %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpsrlw $4, %ymm1, %ymm1
+; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm1
+; AVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm0
+; AVX2-NEXT: vpor %ymm0, %ymm3, %ymm0
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: clmulr_v32i8:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpmovzxbw {{.*#+}} ymm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
+; AVX512-NEXT: vextracti128 $1, %ymm1, %xmm1
+; AVX512-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
+; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm2, %zmm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm2, %zmm3
+; AVX512-NEXT: vextracti64x4 $1, %zmm3, %ymm4
+; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
+; AVX512-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
+; AVX512-NEXT: vpmullw %ymm4, %ymm1, %ymm4
+; AVX512-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
+; AVX512-NEXT: vpmullw %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vinserti64x4 $1, %ymm4, %zmm3, %zmm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm2, %zmm4
+; AVX512-NEXT: vextracti64x4 $1, %zmm4, %ymm5
+; AVX512-NEXT: vpmullw %ymm5, %ymm1, %ymm5
+; AVX512-NEXT: vpmullw %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vinserti64x4 $1, %ymm5, %zmm4, %zmm4
+; AVX512-NEXT: vpxorq %zmm3, %zmm4, %zmm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm2, %zmm4
+; AVX512-NEXT: vextracti64x4 $1, %zmm4, %ymm5
+; AVX512-NEXT: vpmullw %ymm5, %ymm1, %ymm5
+; AVX512-NEXT: vpmullw %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vinserti64x4 $1, %ymm5, %zmm4, %zmm4
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm2, %zmm5
+; AVX512-NEXT: vextracti64x4 $1, %zmm5, %ymm6
+; AVX512-NEXT: vpmullw %ymm6, %ymm1, %ymm6
+; AVX512-NEXT: vpmullw %ymm5, %ymm0, %ymm5
+; AVX512-NEXT: vinserti64x4 $1, %ymm6, %zmm5, %zmm5
+; AVX512-NEXT: vpternlogq {{.*#+}} zmm5 = zmm5 ^ zmm3 ^ zmm4
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm2, %zmm3
+; AVX512-NEXT: vextracti64x4 $1, %zmm3, %ymm4
+; AVX512-NEXT: vpmullw %ymm4, %ymm1, %ymm4
+; AVX512-NEXT: vpmullw %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vinserti64x4 $1, %ymm4, %zmm3, %zmm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm2, %zmm4
+; AVX512-NEXT: vextracti64x4 $1, %zmm4, %ymm6
+; AVX512-NEXT: vpmullw %ymm6, %ymm1, %ymm6
+; AVX512-NEXT: vpmullw %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vinserti64x4 $1, %ymm6, %zmm4, %zmm4
+; AVX512-NEXT: vpternlogq {{.*#+}} zmm4 = zmm4 ^ zmm5 ^ zmm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm2, %zmm3
+; AVX512-NEXT: vextracti64x4 $1, %zmm3, %ymm5
+; AVX512-NEXT: vpmullw %ymm5, %ymm1, %ymm5
+; AVX512-NEXT: vpmullw %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vinserti64x4 $1, %ymm5, %zmm3, %zmm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm2, %zmm2
+; AVX512-NEXT: vextracti64x4 $1, %zmm2, %ymm5
+; AVX512-NEXT: vpmullw %ymm5, %ymm1, %ymm1
+; AVX512-NEXT: vpmullw %ymm2, %ymm0, %ymm0
+; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
+; AVX512-NEXT: vpternlogq {{.*#+}} zmm0 = zmm0 ^ zmm4 ^ zmm3
+; AVX512-NEXT: vpsrlw $7, %ymm0, %ymm1
+; AVX512-NEXT: vpmovzxwd {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero
+; AVX512-NEXT: vpmovdb %zmm1, %xmm1
+; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm0
+; AVX512-NEXT: vpsrlw $7, %ymm0, %ymm0
+; AVX512-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
+; AVX512-NEXT: vpmovdb %zmm0, %xmm0
+; AVX512-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
+; AVX512-NEXT: retq
+ %a.ext = zext <32 x i8> %a to <32 x i16>
+ %b.ext = zext <32 x i8> %b to <32 x i16>
+ %clmul = call <32 x i16> @llvm.clmul.v32i16(<32 x i16> %a.ext, <32 x i16> %b.ext)
+ %res.ext = lshr <32 x i16> %clmul, splat (i16 7)
+ %res = trunc <32 x i16> %res.ext to <32 x i8>
+ ret <32 x i8> %res
+}
+
+define <16 x i16> @clmulr_v16i16(<16 x i16> %a, <16 x i16> %b) nounwind {
+; AVX1-LABEL: clmulr_v16i16:
+; AVX1: # %bb.0:
+; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
+; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
+; AVX1-NEXT: vpshufb %xmm3, %xmm2, %xmm5
+; AVX1-NEXT: vbroadcastss {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; AVX1-NEXT: vpand %xmm2, %xmm5, %xmm6
+; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [0,128,64,192,32,160,96,224,16,144,80,208,48,176,112,240]
+; AVX1-NEXT: vpshufb %xmm6, %xmm4, %xmm6
+; AVX1-NEXT: vpsrlw $4, %xmm5, %xmm5
+; AVX1-NEXT: vpand %xmm2, %xmm5, %xmm7
+; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [0,8,4,12,2,10,6,14,1,9,5,13,3,11,7,15]
+; AVX1-NEXT: vpshufb %xmm7, %xmm5, %xmm7
+; AVX1-NEXT: vpor %xmm7, %xmm6, %xmm6
+; AVX1-NEXT: vpshufb %xmm3, %xmm1, %xmm1
+; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm7
+; AVX1-NEXT: vpshufb %xmm7, %xmm4, %xmm7
+; AVX1-NEXT: vpsrlw $4, %xmm1, %xmm1
+; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm1
+; AVX1-NEXT: vpshufb %xmm1, %xmm5, %xmm1
+; AVX1-NEXT: vpor %xmm1, %xmm7, %xmm1
+; AVX1-NEXT: vinsertf128 $1, %xmm6, %ymm1, %ymm1
+; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm7
+; AVX1-NEXT: vextractf128 $1, %ymm7, %xmm8
+; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm6
+; AVX1-NEXT: vpshufb %xmm3, %xmm6, %xmm6
+; AVX1-NEXT: vpand %xmm2, %xmm6, %xmm9
+; AVX1-NEXT: vpshufb %xmm9, %xmm4, %xmm9
+; AVX1-NEXT: vpsrlw $4, %xmm6, %xmm6
+; AVX1-NEXT: vpand %xmm2, %xmm6, %xmm6
+; AVX1-NEXT: vpshufb %xmm6, %xmm5, %xmm6
+; AVX1-NEXT: vpor %xmm6, %xmm9, %xmm6
+; AVX1-NEXT: vpmullw %xmm6, %xmm8, %xmm8
+; AVX1-NEXT: vpshufb %xmm3, %xmm0, %xmm0
+; AVX1-NEXT: vpand %xmm2, %xmm0, %xmm9
+; AVX1-NEXT: vpshufb %xmm9, %xmm4, %xmm9
+; AVX1-NEXT: vpsrlw $4, %xmm0, %xmm0
+; AVX1-NEXT: vpand %xmm2, %xmm0, %xmm0
+; AVX1-NEXT: vpshufb %xmm0, %xmm5, %xmm0
+; AVX1-NEXT: vpor %xmm0, %xmm9, %xmm0
+; AVX1-NEXT: vpmullw %xmm7, %xmm0, %xmm7
+; AVX1-NEXT: vinsertf128 $1, %xmm8, %ymm7, %ymm7
+; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm8
+; AVX1-NEXT: vextractf128 $1, %ymm8, %xmm9
+; AVX1-NEXT: vpmullw %xmm6, %xmm9, %xmm9
+; AVX1-NEXT: vpmullw %xmm0, %xmm8, %xmm8
+; AVX1-NEXT: vinsertf128 $1, %xmm9, %ymm8, %ymm8
+; AVX1-NEXT: vxorps %ymm7, %ymm8, %ymm7
+; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm8
+; AVX1-NEXT: vextractf128 $1, %y...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/177561
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