[llvm] [AArch64][ISel] Add lowering for i8 clmul intrinsics (PR #177323)

[David Green via llvm-commits]

================
@@ -1323,6 +1323,11 @@ def fminnum_nnan : PatFrag<(ops node:$Rn, node:$Rm),
   return N->getFlags().hasNoNaNs();
   }]>;
 
+def pmul_or_clmul : PatFrags<(ops node:$Rn, node:$Rm),
+                             [(int_aarch64_neon_pmul node:$Rn, node:$Rm),
----------------
davemgreen wrote:

We should probably be converting the pmul intrinsics to clmul, so that we don't need both the patterns. We have some similar code in performIntrinsicCombine or LowerINTRINSIC_WO_CHAIN and AArch64LegalizerInfo::legalizeIntrinsic.

https://github.com/llvm/llvm-project/pull/177323