[llvm] [AArch64] fix copy from GPR32 to FPR16 (PR #176594)

[Matt Arsenault via llvm-commits]

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@@ -408,13 +408,33 @@ bool InlineAsmLowering::lowerInlineAsm(
         ArrayRef<Register> SrcRegs = GetOrCreateVRegs(*OpInfo.CallOperandVal);
         assert(SrcRegs.size() == 1 && "Single register is expected here");
 
-        // When Def is physreg: use given input.
+        // We need the tied input to live in the same register class as the def.
+        //
+        // - if Def is a vreg, we can just use its regclass.
+        // - if Def is a physreg, create a vreg in the minimal regclass for that
+        //   physreg.
+        //
+        // Otherwise RegBankSelect may leave it in the wrong bank (e.g. GPR even
+        // though it's tied to an FP physreg).
         Register In = SrcRegs[0];
-        // When Def is vreg: copy input to new vreg with same reg class as Def.
+        const TargetRegisterClass *RC;
+
         if (Def.isVirtual()) {
-          In = MRI->createVirtualRegister(MRI->getRegClass(Def));
-          if (!buildAnyextOrCopy(In, SrcRegs[0], MIRBuilder))
-            return false;
+          RC = MRI->getRegClass(Def);
+        } else {
+          RC = TRI->getMinimalPhysRegClass(Def);
+        }
+
+        if (RC) {
+          // Materialize `In` in a new vreg if its register class does not match
+          // the register class of `Def`.
+          const TargetRegisterClass *InRC = MRI->getRegClassOrNull(In);
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arsenm wrote:

Null case should be impossible (or if it's hit, it's being called with a physreg which you should avoid doing?)

https://github.com/llvm/llvm-project/pull/176594