[llvm] [RISCV] Add ZZZ_ to some inline assembly vector register classes to sort them after VR/VRNoV0 in regclass enum. (PR #177087)

Pengcheng Wang via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 21 23:12:50 PST 2026

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wangpc-pp wrote:

/cherry-pick 73a309e20e92ff8e9af295c81ee74a58b07a93ba

https://github.com/llvm/llvm-project/pull/177087

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