[llvm] [ReachingDefAnalysis] Track function live-in registers. (PR #177012)
Mikhail Gudim via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 21 09:12:09 PST 2026
https://github.com/mgudim updated https://github.com/llvm/llvm-project/pull/177012
>From 73029ce9b83978944f9fb99f429cbcd4dc75ebf7 Mon Sep 17 00:00:00 2001
From: Mikhail Gudim <mgudim at qti.qualcomm.com>
Date: Tue, 20 Jan 2026 12:11:26 -0800
Subject: [PATCH 1/2] [ReachingDefAnalysis] Track function live-in registers.
Make `getGlobalReachingDefs` set a flag `HasLiveInPath` which indicates
if there is at least one path from function entry to `MI` along which a
entry's live-in register is not modified.
---
.../llvm/CodeGen/ReachingDefAnalysis.h | 25 +-
llvm/lib/CodeGen/ReachingDefAnalysis.cpp | 89 +++--
.../ARM/ARMFixCortexA57AES1742098Pass.cpp | 3 +-
llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 18 +-
.../CodeGen/RISCV/rda-entry-bb-is-a-loop.mir | 2 +-
llvm/test/CodeGen/RISCV/rda-liveins.mir | 43 ++-
llvm/test/CodeGen/RISCV/rda-stack.mir | 350 +++++++++---------
7 files changed, 306 insertions(+), 224 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/ReachingDefAnalysis.h b/llvm/include/llvm/CodeGen/ReachingDefAnalysis.h
index b6ca1d6e9b328..6e6ddc873c991 100644
--- a/llvm/include/llvm/CodeGen/ReachingDefAnalysis.h
+++ b/llvm/include/llvm/CodeGen/ReachingDefAnalysis.h
@@ -152,8 +152,8 @@ class ReachingDefInfo {
/// Default values are 'nothing happened a long time ago'.
static constexpr int ReachingDefDefaultVal = -(1 << 21);
- /// Special values for function live-ins.
- static constexpr int FunctionLiveInMarker = -1;
+ /// Clearance of live-in registers
+ static constexpr int LiveInClearance = 1;
using InstSet = SmallPtrSetImpl<MachineInstr*>;
using BlockSet = SmallPtrSetImpl<MachineBasicBlock*>;
@@ -193,8 +193,10 @@ class ReachingDefInfo {
/// Return the local MI that produces the live out value for Reg, or
/// nullptr for a non-live out or non-local def.
- MachineInstr *getLocalLiveOutMIDef(MachineBasicBlock *MBB,
- Register Reg) const;
+ /// Sets IsFunctionLiveIn to `true` if `MBB` is an entry block, `Reg` is a
+ /// function live-in and it does not get defined in `MBB`.
+ MachineInstr *getLocalLiveOutMIDef(MachineBasicBlock *MBB, Register Reg,
+ bool &IsFunctionLiveIn) const;
/// If a single MachineInstr creates the reaching definition, then return it.
/// Otherwise return null.
@@ -230,9 +232,13 @@ class ReachingDefInfo {
/// Search MBB for a definition of Reg and insert it into Defs. If no
/// definition is found, recursively search the predecessor blocks for them.
+ /// HasLiveInPath is set to `true` if `Reg` is live-in on function entry and
+ /// there is at least one path from function entry to the end of `MBB` along
+ /// which `Reg` is not modified.
void getLiveOuts(MachineBasicBlock *MBB, Register Reg, InstSet &Defs,
- BlockSet &VisitedBBs) const;
- void getLiveOuts(MachineBasicBlock *MBB, Register Reg, InstSet &Defs) const;
+ BlockSet &VisitedBBs, bool &HasLiveInPath) const;
+ void getLiveOuts(MachineBasicBlock *MBB, Register Reg, InstSet &Defs,
+ bool &HasLiveInPath) const;
/// For the given block, collect the instructions that use the live-in
/// value of the provided register. Return whether the value is still
@@ -245,8 +251,11 @@ class ReachingDefInfo {
/// Collect all possible definitions of the value stored in Reg, which is
/// used by MI.
- void getGlobalReachingDefs(MachineInstr *MI, Register Reg,
- InstSet &Defs) const;
+ /// HasLiveInPath set to `true` if `Reg` is live-in on function entry and
+ /// there is at least one path from function entry to MI along which `Reg` is
+ /// not modified.
+ void getGlobalReachingDefs(MachineInstr *MI, Register Reg, InstSet &Defs,
+ bool &HasLiveInPath) const;
/// Return whether From can be moved forwards to just before To.
bool isSafeToMoveForwards(MachineInstr *From, MachineInstr *To) const;
diff --git a/llvm/lib/CodeGen/ReachingDefAnalysis.cpp b/llvm/lib/CodeGen/ReachingDefAnalysis.cpp
index 160c8f43217a8..0e12fab41e255 100644
--- a/llvm/lib/CodeGen/ReachingDefAnalysis.cpp
+++ b/llvm/lib/CodeGen/ReachingDefAnalysis.cpp
@@ -20,6 +20,14 @@ using namespace llvm;
#define DEBUG_TYPE "reaching-defs-analysis"
+static void isFunctionLiveIn(Register Reg, const MachineBasicBlock &MBB,
+ bool &IsFunctionLiveIn) {
+ if (!Reg.isPhysical() || &MBB != &MBB.getParent()->front() ||
+ !MBB.isLiveIn(Reg))
+ return;
+ IsFunctionLiveIn = true;
+}
+
AnalysisKey ReachingDefAnalysis::Key;
ReachingDefAnalysis::Result
@@ -128,15 +136,15 @@ void ReachingDefInfo::enterBasicBlock(MachineBasicBlock *MBB) {
LiveRegs.assign(NumRegUnits, ReachingDefDefaultVal);
// This is the entry block.
- if (MBB->pred_empty()) {
+ if (MBB == &MBB->getParent()->front()) {
for (const auto &LI : MBB->liveins()) {
for (MCRegUnit Unit : TRI->regunits(LI.PhysReg)) {
// Treat function live-ins as if they were defined just before the first
// instruction. Usually, function arguments are set up immediately
// before the call.
- if (LiveRegs[static_cast<unsigned>(Unit)] != FunctionLiveInMarker) {
- LiveRegs[static_cast<unsigned>(Unit)] = FunctionLiveInMarker;
- MBBReachingDefs.append(MBBNumber, Unit, FunctionLiveInMarker);
+ if (LiveRegs[static_cast<unsigned>(Unit)] != -LiveInClearance) {
+ LiveRegs[static_cast<unsigned>(Unit)] = -LiveInClearance;
+ MBBReachingDefs.append(MBBNumber, Unit, -LiveInClearance);
}
}
}
@@ -323,7 +331,8 @@ void ReachingDefInfo::print(raw_ostream &OS) {
} else
continue;
Defs.clear();
- getGlobalReachingDefs(&MI, Reg, Defs);
+ bool HasLiveInPath = false;
+ getGlobalReachingDefs(&MI, Reg, Defs, HasLiveInPath);
MO.print(OS, TRI);
SmallVector<int, 0> Nums;
for (MachineInstr *Def : Defs)
@@ -332,6 +341,8 @@ void ReachingDefInfo::print(raw_ostream &OS) {
OS << ":{ ";
for (int Num : Nums)
OS << Num << " ";
+ if (HasLiveInPath)
+ OS << "livein ";
OS << "}\n";
}
OS << InstToNumMap[&MI] << ": " << MI << "\n";
@@ -522,7 +533,9 @@ void ReachingDefInfo::getGlobalUses(MachineInstr *MI, Register Reg,
getReachingLocalUses(MI, Reg, Uses);
// Handle live-out values.
- if (auto *LiveOut = getLocalLiveOutMIDef(MI->getParent(), Reg)) {
+ bool IsFunctionLiveIn = false;
+ if (auto *LiveOut =
+ getLocalLiveOutMIDef(MI->getParent(), Reg, IsFunctionLiveIn)) {
if (LiveOut != MI)
return;
@@ -540,24 +553,34 @@ void ReachingDefInfo::getGlobalUses(MachineInstr *MI, Register Reg,
}
void ReachingDefInfo::getGlobalReachingDefs(MachineInstr *MI, Register Reg,
- InstSet &Defs) const {
- if (auto *Def = getUniqueReachingMIDef(MI, Reg)) {
- Defs.insert(Def);
+ InstSet &Defs,
+ bool &HasLiveInPath) const {
+ // If there's a local def before MI, return it.
+ int DefInstrId = getReachingDef(MI, Reg);
+ if (DefInstrId < 0) {
+ isFunctionLiveIn(Reg, *MI->getParent(), HasLiveInPath);
+ } else {
+ MachineInstr *LocalDef = getInstFromId(MI->getParent(), DefInstrId);
+ Defs.insert(LocalDef);
return;
}
- for (auto *MBB : MI->getParent()->predecessors())
- getLiveOuts(MBB, Reg, Defs);
+ for (auto *MBB : MI->getParent()->predecessors()) {
+ bool HasLiveInPathToPred = false;
+ getLiveOuts(MBB, Reg, Defs, HasLiveInPathToPred);
+ HasLiveInPath |= HasLiveInPathToPred;
+ }
}
void ReachingDefInfo::getLiveOuts(MachineBasicBlock *MBB, Register Reg,
- InstSet &Defs) const {
+ InstSet &Defs, bool &HasLiveInPath) const {
SmallPtrSet<MachineBasicBlock*, 2> VisitedBBs;
- getLiveOuts(MBB, Reg, Defs, VisitedBBs);
+ getLiveOuts(MBB, Reg, Defs, VisitedBBs, HasLiveInPath);
}
void ReachingDefInfo::getLiveOuts(MachineBasicBlock *MBB, Register Reg,
- InstSet &Defs, BlockSet &VisitedBBs) const {
+ InstSet &Defs, BlockSet &VisitedBBs,
+ bool &HasLiveInPath) const {
if (VisitedBBs.count(MBB))
return;
@@ -567,11 +590,18 @@ void ReachingDefInfo::getLiveOuts(MachineBasicBlock *MBB, Register Reg,
if (Reg.isPhysical() && LiveRegs.available(Reg))
return;
- if (auto *Def = getLocalLiveOutMIDef(MBB, Reg))
+ bool IsFunctionLiveIn = false;
+ auto *Def = getLocalLiveOutMIDef(MBB, Reg, IsFunctionLiveIn);
+ HasLiveInPath = IsFunctionLiveIn;
+ if (Def)
Defs.insert(Def);
- else
- for (auto *Pred : MBB->predecessors())
- getLiveOuts(Pred, Reg, Defs, VisitedBBs);
+ else {
+ for (auto *Pred : MBB->predecessors()) {
+ bool HasLiveInPathToPred = false;
+ getLiveOuts(Pred, Reg, Defs, VisitedBBs, HasLiveInPathToPred);
+ HasLiveInPath |= HasLiveInPathToPred;
+ }
+ }
}
MachineInstr *ReachingDefInfo::getUniqueReachingMIDef(MachineInstr *MI,
@@ -581,10 +611,11 @@ MachineInstr *ReachingDefInfo::getUniqueReachingMIDef(MachineInstr *MI,
if (LocalDef && InstIds.lookup(LocalDef) < InstIds.lookup(MI))
return LocalDef;
- SmallPtrSet<MachineInstr*, 2> Incoming;
+ SmallPtrSet<MachineInstr *, 2> Incoming;
MachineBasicBlock *Parent = MI->getParent();
+ bool HasLiveInPath = false;
for (auto *Pred : Parent->predecessors())
- getLiveOuts(Pred, Reg, Incoming);
+ getLiveOuts(Pred, Reg, Incoming, HasLiveInPath);
// Check that we have a single incoming value and that it does not
// come from the same block as MI - since it would mean that the def
@@ -633,7 +664,8 @@ bool ReachingDefInfo::isRegDefinedAfter(MachineInstr *MI, Register Reg) const {
getReachingDef(MI, Reg) != getReachingDef(&*Last, Reg))
return true;
- if (auto *Def = getLocalLiveOutMIDef(MBB, Reg))
+ bool IsFunctionLiveIn = false;
+ if (auto *Def = getLocalLiveOutMIDef(MBB, Reg, IsFunctionLiveIn))
return Def == getReachingLocalMIDef(MI, Reg);
return false;
@@ -660,16 +692,21 @@ bool ReachingDefInfo::isReachingDefLiveOut(MachineInstr *MI,
return true;
}
-MachineInstr *ReachingDefInfo::getLocalLiveOutMIDef(MachineBasicBlock *MBB,
- Register Reg) const {
+MachineInstr *
+ReachingDefInfo::getLocalLiveOutMIDef(MachineBasicBlock *MBB, Register Reg,
+ bool &IsFunctionLiveIn) const {
LiveRegUnits LiveRegs(*TRI);
LiveRegs.addLiveOuts(*MBB);
if (Reg.isPhysical() && LiveRegs.available(Reg))
return nullptr;
auto Last = MBB->getLastNonDebugInstr();
- if (Last == MBB->end())
+ if (Last == MBB->end()) {
+ // we could have an empty entry block, so we need to check if Reg is a
+ // function livein.
+ isFunctionLiveIn(Reg, *MBB, IsFunctionLiveIn);
return nullptr;
+ }
// Check if Last is the definition
if (Reg.isStack()) {
@@ -683,6 +720,10 @@ MachineInstr *ReachingDefInfo::getLocalLiveOutMIDef(MachineBasicBlock *MBB,
}
int Def = getReachingDef(&*Last, Reg);
+ if (Def < 0) {
+ isFunctionLiveIn(Reg, *MBB, IsFunctionLiveIn);
+ }
+
return Def < 0 ? nullptr : getInstFromId(MBB, Def);
}
diff --git a/llvm/lib/Target/ARM/ARMFixCortexA57AES1742098Pass.cpp b/llvm/lib/Target/ARM/ARMFixCortexA57AES1742098Pass.cpp
index 0bb637edbae96..25510091d93e8 100644
--- a/llvm/lib/Target/ARM/ARMFixCortexA57AES1742098Pass.cpp
+++ b/llvm/lib/Target/ARM/ARMFixCortexA57AES1742098Pass.cpp
@@ -288,7 +288,8 @@ void ARMFixCortexA57AES1742098::analyzeMF(
// Inspect all operands, choosing whether to insert a fixup.
for (MachineOperand &MOp : MI.uses()) {
SmallPtrSet<MachineInstr *, 1> AllDefs{};
- RDI.getGlobalReachingDefs(&MI, MOp.getReg(), AllDefs);
+ bool HasLiveInPath = false;
+ RDI.getGlobalReachingDefs(&MI, MOp.getReg(), AllDefs, HasLiveInPath);
// Planned Fixup: This should be added to FixupLocsForFn at most once.
AESFixupLocation NewLoc{&MBB, &MI, &MOp};
diff --git a/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp b/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
index 1719165fb6717..66f7c8fc63bd0 100644
--- a/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
+++ b/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
@@ -299,7 +299,8 @@ namespace {
return true;
SmallPtrSet<MachineInstr *, 2> Defs;
- RDI.getGlobalReachingDefs(MI, MO.getReg(), Defs);
+ bool HasLiveInPath = false;
+ RDI.getGlobalReachingDefs(MI, MO.getReg(), Defs, HasLiveInPath);
if (Defs.empty())
return true;
@@ -647,8 +648,9 @@ bool LowOverheadLoop::ValidateTailPredicate() {
if (StartInsertPt != StartInsertBB->end() &&
!RDI.isReachingDefLiveOut(&*StartInsertPt, NumElements)) {
- if (auto *ElemDef =
- RDI.getLocalLiveOutMIDef(StartInsertBB, NumElements)) {
+ bool IsFunctionLiveIn = false;
+ if (auto *ElemDef = RDI.getLocalLiveOutMIDef(StartInsertBB, NumElements,
+ IsFunctionLiveIn)) {
if (RDI.isSafeToMoveForwards(ElemDef, &*StartInsertPt)) {
ElemDef->removeFromParent();
StartInsertBB->insert(StartInsertPt, ElemDef);
@@ -890,7 +892,8 @@ static bool producesFalseLanesZero(MachineInstr &MI,
// - If it's predicated, it only matters that it's def register already has
// false lane zeros, so we can ignore the uses.
SmallPtrSet<MachineInstr *, 2> Defs;
- RDI.getGlobalReachingDefs(&MI, MO.getReg(), Defs);
+ bool HasLiveInPath = false;
+ RDI.getGlobalReachingDefs(&MI, MO.getReg(), Defs, HasLiveInPath);
if (Defs.empty())
return false;
for (auto *Def : Defs) {
@@ -1020,9 +1023,12 @@ bool LowOverheadLoop::ValidateLiveOuts() {
}
// Check Q-regs that are live in the exit blocks. We don't collect scalars
// because they won't be affected by lane predication.
- if (QPRs->contains(RegMask.PhysReg))
- if (auto *MI = RDI.getLocalLiveOutMIDef(Header, RegMask.PhysReg))
+ if (QPRs->contains(RegMask.PhysReg)) {
+ bool IsFunctionLiveIn = false;
+ if (auto *MI = RDI.getLocalLiveOutMIDef(Header, RegMask.PhysReg,
+ IsFunctionLiveIn))
LiveOutMIs.insert(MI);
+ }
}
// We've already validated that any VPT predication within the loop will be
diff --git a/llvm/test/CodeGen/RISCV/rda-entry-bb-is-a-loop.mir b/llvm/test/CodeGen/RISCV/rda-entry-bb-is-a-loop.mir
index 0f56e90a28e51..1d2bb30f465ab 100644
--- a/llvm/test/CodeGen/RISCV/rda-entry-bb-is-a-loop.mir
+++ b/llvm/test/CodeGen/RISCV/rda-entry-bb-is-a-loop.mir
@@ -5,7 +5,7 @@ tracksRegLiveness: true
body: |
; CHECK-LABEL: Reaching definitions for for machine function: entry_bb_is_a_loop
; CHECK-NEXT: %bb.0:
- ; CHECK-NEXT: $x10:{ 1 }
+ ; CHECK-NEXT: $x10:{ 1 livein }
; CHECK-NEXT: 0: $x10 = ADDI $x10, 1
; CHECK-EMPTY:
; CHECK-NEXT: $x10:{ 0 }
diff --git a/llvm/test/CodeGen/RISCV/rda-liveins.mir b/llvm/test/CodeGen/RISCV/rda-liveins.mir
index ff7c9efa2de2c..c3fbf02c8011e 100644
--- a/llvm/test/CodeGen/RISCV/rda-liveins.mir
+++ b/llvm/test/CodeGen/RISCV/rda-liveins.mir
@@ -6,7 +6,7 @@ tracksRegLiveness: true
body: |
; CHECK-LABEL: Reaching definitions for for machine function: test0
; CHECK-NEXT: %bb.0:
- ; CHECK-NEXT: implicit $x10:{ }
+ ; CHECK-NEXT: implicit $x10:{ livein }
; CHECK-NEXT: 0: PseudoRET implicit $x10
bb.0.entry:
@@ -21,7 +21,7 @@ tracksRegLiveness: true
body: |
; CHECK-LABEL: Reaching definitions for for machine function: test1
; CHECK-NEXT: %bb.0:
- ; CHECK-NEXT: $x10:{ }
+ ; CHECK-NEXT: $x10:{ livein }
; CHECK-NEXT: 0: $x10 = ADDI $x10, 1
; CHECK-EMPTY:
; CHECK-NEXT: implicit $x10:{ 0 }
@@ -39,19 +39,19 @@ tracksRegLiveness: true
body: |
; CHECK-LABEL: Reaching definitions for for machine function: test2
; CHECK-NEXT: %bb.0:
- ; CHECK-NEXT: $x10:{ }
+ ; CHECK-NEXT: $x10:{ livein }
; CHECK-NEXT: $x0:{ }
; CHECK-NEXT: 0: BEQ $x10, $x0, %bb.2
; CHECK-EMPTY:
; CHECK-NEXT: %bb.1:
- ; CHECK-NEXT: $x10:{ }
+ ; CHECK-NEXT: $x10:{ livein }
; CHECK-NEXT: 1: $x10 = ADDI $x10, 1
; CHECK-EMPTY:
; CHECK-NEXT: implicit $x10:{ 1 }
; CHECK-NEXT: 2: PseudoRET implicit $x10
; CHECK-EMPTY:
; CHECK-NEXT: %bb.2
- ; CHECK-NEXT: implicit $x10:{ }
+ ; CHECK-NEXT: implicit $x10:{ livein }
; CHECK-NEXT: 3: PseudoRET implicit $x10
bb.0.entry:
liveins: $x10
@@ -77,25 +77,25 @@ stack:
body: |
; CHECK-LABEL: Reaching definitions for for machine function: test3
; CHECK-NEXT: %bb.0:
- ; CHECK-NEXT: $x10:{ }
+ ; CHECK-NEXT: $x10:{ livein }
; CHECK-NEXT: $x0:{ }
; CHECK-NEXT: 0: BEQ $x10, $x0, %bb.2
; CHECK-EMPTY:
; CHECK-NEXT: %bb.1:
- ; CHECK-NEXT: $x10:{ }
+ ; CHECK-NEXT: $x10:{ livein }
; CHECK-NEXT: 1: $x10 = ADDI $x10, 1
; CHECK-EMPTY:
; CHECK-NEXT: 2: PseudoBR %bb.3
; CHECK-EMPTY:
; CHECK-NEXT: %bb.2:
- ; CHECK-NEXT: $x10:{ }
+ ; CHECK-NEXT: $x10:{ livein }
; CHECK-NEXT: %stack.0:{ }
; CHECK-NEXT: 3: SD $x10, %stack.0, 0 :: (store (s64))
; CHECK-EMPTY:
; CHECK-NEXT: 4: PseudoBR %bb.3
; CHECK-EMPTY:
; CHECK-NEXT: %bb.3:
- ; CHECK-NEXT: implicit $x10:{ 1 }
+ ; CHECK-NEXT: implicit $x10:{ 1 livein }
; CHECK-NEXT: 5: PseudoRET implicit $x10
bb.0.entry:
liveins: $x10
@@ -115,3 +115,28 @@ body: |
liveins: $x10
PseudoRET implicit $x10
...
+
+---
+name: test6
+tracksRegLiveness: true
+body: |
+ ; CHECK-LABEL: Reaching definitions for for machine function: test6
+ ; CHECK-NEXT: %bb.0:
+ ; CHECK-NEXT: $x10:{ 0 livein }
+ ; CHECK-NEXT: 0: $x10 = ADDI $x10, 1
+ ; CHECK-EMPTY:
+ ; CHECK-NEXT: $x10:{ 0 }
+ ; CHECK-NEXT: $x0:{ }
+ ; CHECK-NEXT: 1: BNE $x10, $x0, %bb.0
+ ; CHECK-EMPTY:
+ ; CHECK-NEXT: %bb.1:
+ ; CHECK-NEXT: 2: PseudoRET
+ bb.0.entry:
+ liveins: $x10
+ $x10 = ADDI $x10, 1
+ BNE $x10, $x0, %bb.0
+
+ bb.1:
+ PseudoRET
+
+...
diff --git a/llvm/test/CodeGen/RISCV/rda-stack.mir b/llvm/test/CodeGen/RISCV/rda-stack.mir
index 367c450f9b155..f944a39420770 100644
--- a/llvm/test/CodeGen/RISCV/rda-stack.mir
+++ b/llvm/test/CodeGen/RISCV/rda-stack.mir
@@ -20,178 +20,178 @@ body: |
$x10 = LD %stack.0, 0 :: (load (s64))
PseudoRET implicit $x10
-...
----
-name: test1
-tracksRegLiveness: true
-stack:
- - { id: 0, name: '', type: default, offset: 0, size: 4, alignment: 4,
- stack-id: default, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, name: '', type: default, offset: 0, size: 4, alignment: 4,
- stack-id: default, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-body: |
- ; CHECK-LABEL: Reaching definitions for for machine function: test1
- ; CHECK-NEXT: %bb.0:
- ; CHECK-NEXT: %stack.0:{ }
- ; CHECK-NEXT: 0: $x10 = LD %stack.0, 0 :: (load (s64))
- ; CHECK-EMPTY:
- ; CHECK-NEXT: %stack.1:{ }
- ; CHECK-NEXT: 1: $x11 = LD %stack.1, 0 :: (load (s64))
- ; CHECK-EMPTY:
- ; CHECK-NEXT: $x10:{ 0 }
- ; CHECK-NEXT: $x11:{ 1 }
- ; CHECK-NEXT: 2: $x10 = ADD $x10, $x11
- ; CHECK-EMPTY:
- ; CHECK-NEXT: implicit $x10:{ 2 }
- ; CHECK-NEXT: 3: PseudoRET implicit $x10
-
- bb.0.entry:
- $x10 = LD %stack.0, 0 :: (load (s64))
- $x11 = LD %stack.1, 0 :: (load (s64))
- $x10 = ADD $x10, $x11
- PseudoRET implicit $x10
-
-...
----
-name: test2
-tracksRegLiveness: true
-stack:
- - { id: 0, name: '', type: default, offset: 0, size: 4, alignment: 4,
- stack-id: default, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, name: '', type: default, offset: 0, size: 4, alignment: 4,
- stack-id: default, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-body: |
- ; CHECK-LABEL: Reaching definitions for for machine function: test2
- ; CHECK-NEXT: %bb.0:
- ; CHECK-NEXT: %stack.0:{ }
- ; CHECK-NEXT: 0: $x10 = LD %stack.0, 0 :: (load (s64))
- ; CHECK-EMPTY:
- ; CHECK-NEXT: %stack.1:{ }
- ; CHECK-NEXT: 1: $x11 = LD %stack.1, 0 :: (load (s64))
- ; CHECK-EMPTY:
- ; CHECK-NEXT: $x10:{ 0 }
- ; CHECK-NEXT: $x11:{ 1 }
- ; CHECK-NEXT: 2: $x10 = ADD $x10, $x11
- ; CHECK-EMPTY:
- ; CHECK-NEXT: $x10:{ 2 }
- ; CHECK-NEXT: %stack.0:{ }
- ; CHECK-NEXT: 3: SD $x10, %stack.0, 0 :: (store (s64))
- ; CHECK-EMPTY:
- ; CHECK-NEXT: %stack.0:{ 3 }
- ; CHECK-NEXT: 4: $x10 = LD %stack.0, 0 :: (load (s64))
- ; CHECK-EMPTY:
- ; CHECK-NEXT: implicit $x10:{ 4 }
- ; CHECK-NEXT: 5: PseudoRET implicit $x10
-
- bb.0.entry:
- $x10 = LD %stack.0, 0 :: (load (s64))
- $x11 = LD %stack.1, 0 :: (load (s64))
- $x10 = ADD $x10, $x11
- SD $x10, %stack.0, 0 :: (store (s64))
- $x10 = LD %stack.0, 0 :: (load (s64))
- PseudoRET implicit $x10
-
-...
----
-name: test3
-tracksRegLiveness: true
-stack:
- - { id: 0, name: '', type: default, offset: 0, size: 4, alignment: 4,
- stack-id: default, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-body: |
- ; CHECK-LABEL: Reaching definitions for for machine function: test3
- ; CHECK-NEXT: %bb.0:
- ; CHECK-NEXT: $x10:{ }
- ; CHECK-NEXT: $x0:{ }
- ; CHECK-NEXT: 0: BEQ $x10, $x0, %bb.2
- ; CHECK-EMPTY:
- ; CHECK-NEXT: %bb.1:
- ; CHECK-NEXT: $x10:{ }
- ; CHECK-NEXT: 1: $x10 = ADDI $x10, 1
- ; CHECK-EMPTY:
- ; CHECK-NEXT: $x10:{ 1 }
- ; CHECK-NEXT: %stack.0:{ }
- ; CHECK-NEXT: 2: SD $x10, %stack.0, 0 :: (store (s64))
- ; CHECK-EMPTY:
- ; CHECK-NEXT: 3: PseudoBR %bb.3
- ; CHECK-EMPTY:
- ; CHECK-NEXT: %bb.2:
- ; CHECK-NEXT: $x10:{ }
- ; CHECK-NEXT: 4: $x10 = ADDI $x10, 2
- ; CHECK-EMPTY:
- ; CHECK-NEXT: $x10:{ 4 }
- ; CHECK-NEXT: %stack.0:{ }
- ; CHECK-NEXT: 5: SD $x10, %stack.0, 0 :: (store (s64))
- ; CHECK-EMPTY:
- ; CHECK-NEXT: %bb.3:
- ; CHECK-NEXT: %stack.0:{ 2 5 }
- ; CHECK-NEXT: 6: $x10 = LD %stack.0, 0 :: (load (s64))
- ; CHECK-EMPTY:
- ; CHECK-NEXT: implicit $x10:{ 6 }
- ; CHECK-NEXT: 7: PseudoRET implicit $x10
-
- bb.0.entry:
- liveins: $x10
- BEQ $x10, $x0, %bb.2
-
- bb.1:
- liveins: $x10
- $x10 = ADDI $x10, 1
- SD $x10, %stack.0, 0 :: (store (s64))
- PseudoBR %bb.3
-
- bb.2:
- liveins: $x10
- $x10 = ADDI $x10, 2
- SD $x10, %stack.0, 0 :: (store (s64))
-
- bb.3:
- $x10 = LD %stack.0, 0 :: (load (s64))
- PseudoRET implicit $x10
-...
----
-name: test4
-tracksRegLiveness: true
-fixedStack:
- - { id: 0, type: default, offset: 0, size: 4, alignment: 16,
- isImmutable: true, isAliased: false }
-stack:
- - { id: 0, name: '', type: default, offset: 0, size: 4, alignment: 4,
- stack-id: default, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, name: '', type: default, offset: 0, size: 4, alignment: 4,
- stack-id: default, callee-saved-register: '', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-body: |
- ; CHECK-LABEL: Reaching definitions for for machine function: test4
- ; CHECK-NEXT: %bb.0:
- ; CHECK-NEXT: $x10:{ }
- ; CHECK-NEXT: %stack.0:{ }
- ; CHECK-NEXT: 0: SD $x10, %stack.0, 0 :: (store (s64))
- ; CHECK-EMPTY:
- ; CHECK-NEXT: $x11:{ }
- ; CHECK-NEXT: %stack.0:{ 0 }
- ; CHECK-NEXT: 1: SD $x11, %stack.0, 0 :: (store (s64))
- ; CHECK-EMPTY:
- ; CHECK-NEXT: $x10:{ }
- ; CHECK-NEXT: %stack.1:{ }
- ; CHECK-NEXT: 2: SD $x10, %stack.1, 0 :: (store (s64))
- ; CHECK-EMPTY:
- ; CHECK-NEXT: $x11:{ }
- ; CHECK-NEXT: %stack.1:{ 2 }
- ; CHECK-NEXT: 3: SD $x11, %stack.1, 0 :: (store (s64))
- ; CHECK-EMPTY:
- ; CHECK-NEXT: 4: PseudoRET
- bb.0.entry:
- liveins: $x10, $x11
- SD $x10, %stack.0, 0 :: (store (s64))
- SD $x11, %stack.0, 0 :: (store (s64))
- SD $x10, %stack.1, 0 :: (store (s64))
- SD $x11, %stack.1, 0 :: (store (s64))
- PseudoRET
-...
+# COM: ...
+# COM: ---
+# COM: name: test1
+# COM: tracksRegLiveness: true
+# COM: stack:
+# COM: - { id: 0, name: '', type: default, offset: 0, size: 4, alignment: 4,
+# COM: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+# COM: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+# COM: - { id: 1, name: '', type: default, offset: 0, size: 4, alignment: 4,
+# COM: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+# COM: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+# COM: body: |
+# COM: ; CHECK-LABEL: Reaching definitions for for machine function: test1
+# COM: ; CHECK-NEXT: %bb.0:
+# COM: ; CHECK-NEXT: %stack.0:{ }
+# COM: ; CHECK-NEXT: 0: $x10 = LD %stack.0, 0 :: (load (s64))
+# COM: ; CHECK-EMPTY:
+# COM: ; CHECK-NEXT: %stack.1:{ }
+# COM: ; CHECK-NEXT: 1: $x11 = LD %stack.1, 0 :: (load (s64))
+# COM: ; CHECK-EMPTY:
+# COM: ; CHECK-NEXT: $x10:{ 0 }
+# COM: ; CHECK-NEXT: $x11:{ 1 }
+# COM: ; CHECK-NEXT: 2: $x10 = ADD $x10, $x11
+# COM: ; CHECK-EMPTY:
+# COM: ; CHECK-NEXT: implicit $x10:{ 2 }
+# COM: ; CHECK-NEXT: 3: PseudoRET implicit $x10
+# COM:
+# COM: bb.0.entry:
+# COM: $x10 = LD %stack.0, 0 :: (load (s64))
+# COM: $x11 = LD %stack.1, 0 :: (load (s64))
+# COM: $x10 = ADD $x10, $x11
+# COM: PseudoRET implicit $x10
+# COM:
+# COM: ...
+# COM: ---
+# COM: name: test2
+# COM: tracksRegLiveness: true
+# COM: stack:
+# COM: - { id: 0, name: '', type: default, offset: 0, size: 4, alignment: 4,
+# COM: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+# COM: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+# COM: - { id: 1, name: '', type: default, offset: 0, size: 4, alignment: 4,
+# COM: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+# COM: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+# COM: body: |
+# COM: ; CHECK-LABEL: Reaching definitions for for machine function: test2
+# COM: ; CHECK-NEXT: %bb.0:
+# COM: ; CHECK-NEXT: %stack.0:{ }
+# COM: ; CHECK-NEXT: 0: $x10 = LD %stack.0, 0 :: (load (s64))
+# COM: ; CHECK-EMPTY:
+# COM: ; CHECK-NEXT: %stack.1:{ }
+# COM: ; CHECK-NEXT: 1: $x11 = LD %stack.1, 0 :: (load (s64))
+# COM: ; CHECK-EMPTY:
+# COM: ; CHECK-NEXT: $x10:{ 0 }
+# COM: ; CHECK-NEXT: $x11:{ 1 }
+# COM: ; CHECK-NEXT: 2: $x10 = ADD $x10, $x11
+# COM: ; CHECK-EMPTY:
+# COM: ; CHECK-NEXT: $x10:{ 2 }
+# COM: ; CHECK-NEXT: %stack.0:{ }
+# COM: ; CHECK-NEXT: 3: SD $x10, %stack.0, 0 :: (store (s64))
+# COM: ; CHECK-EMPTY:
+# COM: ; CHECK-NEXT: %stack.0:{ 3 }
+# COM: ; CHECK-NEXT: 4: $x10 = LD %stack.0, 0 :: (load (s64))
+# COM: ; CHECK-EMPTY:
+# COM: ; CHECK-NEXT: implicit $x10:{ 4 }
+# COM: ; CHECK-NEXT: 5: PseudoRET implicit $x10
+# COM:
+# COM: bb.0.entry:
+# COM: $x10 = LD %stack.0, 0 :: (load (s64))
+# COM: $x11 = LD %stack.1, 0 :: (load (s64))
+# COM: $x10 = ADD $x10, $x11
+# COM: SD $x10, %stack.0, 0 :: (store (s64))
+# COM: $x10 = LD %stack.0, 0 :: (load (s64))
+# COM: PseudoRET implicit $x10
+# COM:
+# COM: ...
+# COM: ---
+# COM: name: test3
+# COM: tracksRegLiveness: true
+# COM: stack:
+# COM: - { id: 0, name: '', type: default, offset: 0, size: 4, alignment: 4,
+# COM: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+# COM: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+# COM: body: |
+# COM: ; CHECK-LABEL: Reaching definitions for for machine function: test3
+# COM: ; CHECK-NEXT: %bb.0:
+# COM: ; CHECK-NEXT: $x10:{ livein }
+# COM: ; CHECK-NEXT: $x0:{ }
+# COM: ; CHECK-NEXT: 0: BEQ $x10, $x0, %bb.2
+# COM: ; CHECK-EMPTY:
+# COM: ; CHECK-NEXT: %bb.1:
+# COM: ; CHECK-NEXT: $x10:{ livein }
+# COM: ; CHECK-NEXT: 1: $x10 = ADDI $x10, 1
+# COM: ; CHECK-EMPTY:
+# COM: ; CHECK-NEXT: $x10:{ 1 }
+# COM: ; CHECK-NEXT: %stack.0:{ }
+# COM: ; CHECK-NEXT: 2: SD $x10, %stack.0, 0 :: (store (s64))
+# COM: ; CHECK-EMPTY:
+# COM: ; CHECK-NEXT: 3: PseudoBR %bb.3
+# COM: ; CHECK-EMPTY:
+# COM: ; CHECK-NEXT: %bb.2:
+# COM: ; CHECK-NEXT: $x10:{ livein }
+# COM: ; CHECK-NEXT: 4: $x10 = ADDI $x10, 2
+# COM: ; CHECK-EMPTY:
+# COM: ; CHECK-NEXT: $x10:{ 4 }
+# COM: ; CHECK-NEXT: %stack.0:{ }
+# COM: ; CHECK-NEXT: 5: SD $x10, %stack.0, 0 :: (store (s64))
+# COM: ; CHECK-EMPTY:
+# COM: ; CHECK-NEXT: %bb.3:
+# COM: ; CHECK-NEXT: %stack.0:{ 2 5 }
+# COM: ; CHECK-NEXT: 6: $x10 = LD %stack.0, 0 :: (load (s64))
+# COM: ; CHECK-EMPTY:
+# COM: ; CHECK-NEXT: implicit $x10:{ 6 }
+# COM: ; CHECK-NEXT: 7: PseudoRET implicit $x10
+# COM:
+# COM: bb.0.entry:
+# COM: liveins: $x10
+# COM: BEQ $x10, $x0, %bb.2
+# COM:
+# COM: bb.1:
+# COM: liveins: $x10
+# COM: $x10 = ADDI $x10, 1
+# COM: SD $x10, %stack.0, 0 :: (store (s64))
+# COM: PseudoBR %bb.3
+# COM:
+# COM: bb.2:
+# COM: liveins: $x10
+# COM: $x10 = ADDI $x10, 2
+# COM: SD $x10, %stack.0, 0 :: (store (s64))
+# COM:
+# COM: bb.3:
+# COM: $x10 = LD %stack.0, 0 :: (load (s64))
+# COM: PseudoRET implicit $x10
+# COM: ...
+# COM: ---
+# COM: name: test4
+# COM: tracksRegLiveness: true
+# COM: fixedStack:
+# COM: - { id: 0, type: default, offset: 0, size: 4, alignment: 16,
+# COM: isImmutable: true, isAliased: false }
+# COM: stack:
+# COM: - { id: 0, name: '', type: default, offset: 0, size: 4, alignment: 4,
+# COM: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+# COM: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+# COM: - { id: 1, name: '', type: default, offset: 0, size: 4, alignment: 4,
+# COM: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+# COM: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+# COM: body: |
+# COM: ; CHECK-LABEL: Reaching definitions for for machine function: test4
+# COM: ; CHECK-NEXT: %bb.0:
+# COM: ; CHECK-NEXT: $x10:{ livein }
+# COM: ; CHECK-NEXT: %stack.0:{ }
+# COM: ; CHECK-NEXT: 0: SD $x10, %stack.0, 0 :: (store (s64))
+# COM: ; CHECK-EMPTY:
+# COM: ; CHECK-NEXT: $x11:{ livein }
+# COM: ; CHECK-NEXT: %stack.0:{ 0 }
+# COM: ; CHECK-NEXT: 1: SD $x11, %stack.0, 0 :: (store (s64))
+# COM: ; CHECK-EMPTY:
+# COM: ; CHECK-NEXT: $x10:{ livein }
+# COM: ; CHECK-NEXT: %stack.1:{ }
+# COM: ; CHECK-NEXT: 2: SD $x10, %stack.1, 0 :: (store (s64))
+# COM: ; CHECK-EMPTY:
+# COM: ; CHECK-NEXT: $x11:{ livein }
+# COM: ; CHECK-NEXT: %stack.1:{ 2 }
+# COM: ; CHECK-NEXT: 3: SD $x11, %stack.1, 0 :: (store (s64))
+# COM: ; CHECK-EMPTY:
+# COM: ; CHECK-NEXT: 4: PseudoRET
+# COM: bb.0.entry:
+# COM: liveins: $x10, $x11
+# COM: SD $x10, %stack.0, 0 :: (store (s64))
+# COM: SD $x11, %stack.0, 0 :: (store (s64))
+# COM: SD $x10, %stack.1, 0 :: (store (s64))
+# COM: SD $x11, %stack.1, 0 :: (store (s64))
+# COM: PseudoRET
+# COM: ...
>From 7686ee41ec6fb117bff37b26553342f0483f8d36 Mon Sep 17 00:00:00 2001
From: Mikhail Gudim <mgudim at qti.qualcomm.com>
Date: Wed, 21 Jan 2026 09:11:40 -0800
Subject: [PATCH 2/2] uncomment tests.
---
llvm/test/CodeGen/RISCV/rda-stack.mir | 350 +++++++++++++-------------
1 file changed, 175 insertions(+), 175 deletions(-)
diff --git a/llvm/test/CodeGen/RISCV/rda-stack.mir b/llvm/test/CodeGen/RISCV/rda-stack.mir
index f944a39420770..57a3895afad65 100644
--- a/llvm/test/CodeGen/RISCV/rda-stack.mir
+++ b/llvm/test/CodeGen/RISCV/rda-stack.mir
@@ -20,178 +20,178 @@ body: |
$x10 = LD %stack.0, 0 :: (load (s64))
PseudoRET implicit $x10
-# COM: ...
-# COM: ---
-# COM: name: test1
-# COM: tracksRegLiveness: true
-# COM: stack:
-# COM: - { id: 0, name: '', type: default, offset: 0, size: 4, alignment: 4,
-# COM: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
-# COM: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-# COM: - { id: 1, name: '', type: default, offset: 0, size: 4, alignment: 4,
-# COM: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
-# COM: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-# COM: body: |
-# COM: ; CHECK-LABEL: Reaching definitions for for machine function: test1
-# COM: ; CHECK-NEXT: %bb.0:
-# COM: ; CHECK-NEXT: %stack.0:{ }
-# COM: ; CHECK-NEXT: 0: $x10 = LD %stack.0, 0 :: (load (s64))
-# COM: ; CHECK-EMPTY:
-# COM: ; CHECK-NEXT: %stack.1:{ }
-# COM: ; CHECK-NEXT: 1: $x11 = LD %stack.1, 0 :: (load (s64))
-# COM: ; CHECK-EMPTY:
-# COM: ; CHECK-NEXT: $x10:{ 0 }
-# COM: ; CHECK-NEXT: $x11:{ 1 }
-# COM: ; CHECK-NEXT: 2: $x10 = ADD $x10, $x11
-# COM: ; CHECK-EMPTY:
-# COM: ; CHECK-NEXT: implicit $x10:{ 2 }
-# COM: ; CHECK-NEXT: 3: PseudoRET implicit $x10
-# COM:
-# COM: bb.0.entry:
-# COM: $x10 = LD %stack.0, 0 :: (load (s64))
-# COM: $x11 = LD %stack.1, 0 :: (load (s64))
-# COM: $x10 = ADD $x10, $x11
-# COM: PseudoRET implicit $x10
-# COM:
-# COM: ...
-# COM: ---
-# COM: name: test2
-# COM: tracksRegLiveness: true
-# COM: stack:
-# COM: - { id: 0, name: '', type: default, offset: 0, size: 4, alignment: 4,
-# COM: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
-# COM: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-# COM: - { id: 1, name: '', type: default, offset: 0, size: 4, alignment: 4,
-# COM: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
-# COM: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-# COM: body: |
-# COM: ; CHECK-LABEL: Reaching definitions for for machine function: test2
-# COM: ; CHECK-NEXT: %bb.0:
-# COM: ; CHECK-NEXT: %stack.0:{ }
-# COM: ; CHECK-NEXT: 0: $x10 = LD %stack.0, 0 :: (load (s64))
-# COM: ; CHECK-EMPTY:
-# COM: ; CHECK-NEXT: %stack.1:{ }
-# COM: ; CHECK-NEXT: 1: $x11 = LD %stack.1, 0 :: (load (s64))
-# COM: ; CHECK-EMPTY:
-# COM: ; CHECK-NEXT: $x10:{ 0 }
-# COM: ; CHECK-NEXT: $x11:{ 1 }
-# COM: ; CHECK-NEXT: 2: $x10 = ADD $x10, $x11
-# COM: ; CHECK-EMPTY:
-# COM: ; CHECK-NEXT: $x10:{ 2 }
-# COM: ; CHECK-NEXT: %stack.0:{ }
-# COM: ; CHECK-NEXT: 3: SD $x10, %stack.0, 0 :: (store (s64))
-# COM: ; CHECK-EMPTY:
-# COM: ; CHECK-NEXT: %stack.0:{ 3 }
-# COM: ; CHECK-NEXT: 4: $x10 = LD %stack.0, 0 :: (load (s64))
-# COM: ; CHECK-EMPTY:
-# COM: ; CHECK-NEXT: implicit $x10:{ 4 }
-# COM: ; CHECK-NEXT: 5: PseudoRET implicit $x10
-# COM:
-# COM: bb.0.entry:
-# COM: $x10 = LD %stack.0, 0 :: (load (s64))
-# COM: $x11 = LD %stack.1, 0 :: (load (s64))
-# COM: $x10 = ADD $x10, $x11
-# COM: SD $x10, %stack.0, 0 :: (store (s64))
-# COM: $x10 = LD %stack.0, 0 :: (load (s64))
-# COM: PseudoRET implicit $x10
-# COM:
-# COM: ...
-# COM: ---
-# COM: name: test3
-# COM: tracksRegLiveness: true
-# COM: stack:
-# COM: - { id: 0, name: '', type: default, offset: 0, size: 4, alignment: 4,
-# COM: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
-# COM: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-# COM: body: |
-# COM: ; CHECK-LABEL: Reaching definitions for for machine function: test3
-# COM: ; CHECK-NEXT: %bb.0:
-# COM: ; CHECK-NEXT: $x10:{ livein }
-# COM: ; CHECK-NEXT: $x0:{ }
-# COM: ; CHECK-NEXT: 0: BEQ $x10, $x0, %bb.2
-# COM: ; CHECK-EMPTY:
-# COM: ; CHECK-NEXT: %bb.1:
-# COM: ; CHECK-NEXT: $x10:{ livein }
-# COM: ; CHECK-NEXT: 1: $x10 = ADDI $x10, 1
-# COM: ; CHECK-EMPTY:
-# COM: ; CHECK-NEXT: $x10:{ 1 }
-# COM: ; CHECK-NEXT: %stack.0:{ }
-# COM: ; CHECK-NEXT: 2: SD $x10, %stack.0, 0 :: (store (s64))
-# COM: ; CHECK-EMPTY:
-# COM: ; CHECK-NEXT: 3: PseudoBR %bb.3
-# COM: ; CHECK-EMPTY:
-# COM: ; CHECK-NEXT: %bb.2:
-# COM: ; CHECK-NEXT: $x10:{ livein }
-# COM: ; CHECK-NEXT: 4: $x10 = ADDI $x10, 2
-# COM: ; CHECK-EMPTY:
-# COM: ; CHECK-NEXT: $x10:{ 4 }
-# COM: ; CHECK-NEXT: %stack.0:{ }
-# COM: ; CHECK-NEXT: 5: SD $x10, %stack.0, 0 :: (store (s64))
-# COM: ; CHECK-EMPTY:
-# COM: ; CHECK-NEXT: %bb.3:
-# COM: ; CHECK-NEXT: %stack.0:{ 2 5 }
-# COM: ; CHECK-NEXT: 6: $x10 = LD %stack.0, 0 :: (load (s64))
-# COM: ; CHECK-EMPTY:
-# COM: ; CHECK-NEXT: implicit $x10:{ 6 }
-# COM: ; CHECK-NEXT: 7: PseudoRET implicit $x10
-# COM:
-# COM: bb.0.entry:
-# COM: liveins: $x10
-# COM: BEQ $x10, $x0, %bb.2
-# COM:
-# COM: bb.1:
-# COM: liveins: $x10
-# COM: $x10 = ADDI $x10, 1
-# COM: SD $x10, %stack.0, 0 :: (store (s64))
-# COM: PseudoBR %bb.3
-# COM:
-# COM: bb.2:
-# COM: liveins: $x10
-# COM: $x10 = ADDI $x10, 2
-# COM: SD $x10, %stack.0, 0 :: (store (s64))
-# COM:
-# COM: bb.3:
-# COM: $x10 = LD %stack.0, 0 :: (load (s64))
-# COM: PseudoRET implicit $x10
-# COM: ...
-# COM: ---
-# COM: name: test4
-# COM: tracksRegLiveness: true
-# COM: fixedStack:
-# COM: - { id: 0, type: default, offset: 0, size: 4, alignment: 16,
-# COM: isImmutable: true, isAliased: false }
-# COM: stack:
-# COM: - { id: 0, name: '', type: default, offset: 0, size: 4, alignment: 4,
-# COM: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
-# COM: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-# COM: - { id: 1, name: '', type: default, offset: 0, size: 4, alignment: 4,
-# COM: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
-# COM: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-# COM: body: |
-# COM: ; CHECK-LABEL: Reaching definitions for for machine function: test4
-# COM: ; CHECK-NEXT: %bb.0:
-# COM: ; CHECK-NEXT: $x10:{ livein }
-# COM: ; CHECK-NEXT: %stack.0:{ }
-# COM: ; CHECK-NEXT: 0: SD $x10, %stack.0, 0 :: (store (s64))
-# COM: ; CHECK-EMPTY:
-# COM: ; CHECK-NEXT: $x11:{ livein }
-# COM: ; CHECK-NEXT: %stack.0:{ 0 }
-# COM: ; CHECK-NEXT: 1: SD $x11, %stack.0, 0 :: (store (s64))
-# COM: ; CHECK-EMPTY:
-# COM: ; CHECK-NEXT: $x10:{ livein }
-# COM: ; CHECK-NEXT: %stack.1:{ }
-# COM: ; CHECK-NEXT: 2: SD $x10, %stack.1, 0 :: (store (s64))
-# COM: ; CHECK-EMPTY:
-# COM: ; CHECK-NEXT: $x11:{ livein }
-# COM: ; CHECK-NEXT: %stack.1:{ 2 }
-# COM: ; CHECK-NEXT: 3: SD $x11, %stack.1, 0 :: (store (s64))
-# COM: ; CHECK-EMPTY:
-# COM: ; CHECK-NEXT: 4: PseudoRET
-# COM: bb.0.entry:
-# COM: liveins: $x10, $x11
-# COM: SD $x10, %stack.0, 0 :: (store (s64))
-# COM: SD $x11, %stack.0, 0 :: (store (s64))
-# COM: SD $x10, %stack.1, 0 :: (store (s64))
-# COM: SD $x11, %stack.1, 0 :: (store (s64))
-# COM: PseudoRET
-# COM: ...
+...
+---
+name: test1
+tracksRegLiveness: true
+stack:
+ - { id: 0, name: '', type: default, offset: 0, size: 4, alignment: 4,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+ debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+ - { id: 1, name: '', type: default, offset: 0, size: 4, alignment: 4,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+ debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+body: |
+ ; CHECK-LABEL: Reaching definitions for for machine function: test1
+ ; CHECK-NEXT: %bb.0:
+ ; CHECK-NEXT: %stack.0:{ }
+ ; CHECK-NEXT: 0: $x10 = LD %stack.0, 0 :: (load (s64))
+ ; CHECK-EMPTY:
+ ; CHECK-NEXT: %stack.1:{ }
+ ; CHECK-NEXT: 1: $x11 = LD %stack.1, 0 :: (load (s64))
+ ; CHECK-EMPTY:
+ ; CHECK-NEXT: $x10:{ 0 }
+ ; CHECK-NEXT: $x11:{ 1 }
+ ; CHECK-NEXT: 2: $x10 = ADD $x10, $x11
+ ; CHECK-EMPTY:
+ ; CHECK-NEXT: implicit $x10:{ 2 }
+ ; CHECK-NEXT: 3: PseudoRET implicit $x10
+
+ bb.0.entry:
+ $x10 = LD %stack.0, 0 :: (load (s64))
+ $x11 = LD %stack.1, 0 :: (load (s64))
+ $x10 = ADD $x10, $x11
+ PseudoRET implicit $x10
+
+...
+---
+name: test2
+tracksRegLiveness: true
+stack:
+ - { id: 0, name: '', type: default, offset: 0, size: 4, alignment: 4,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+ debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+ - { id: 1, name: '', type: default, offset: 0, size: 4, alignment: 4,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+ debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+body: |
+ ; CHECK-LABEL: Reaching definitions for for machine function: test2
+ ; CHECK-NEXT: %bb.0:
+ ; CHECK-NEXT: %stack.0:{ }
+ ; CHECK-NEXT: 0: $x10 = LD %stack.0, 0 :: (load (s64))
+ ; CHECK-EMPTY:
+ ; CHECK-NEXT: %stack.1:{ }
+ ; CHECK-NEXT: 1: $x11 = LD %stack.1, 0 :: (load (s64))
+ ; CHECK-EMPTY:
+ ; CHECK-NEXT: $x10:{ 0 }
+ ; CHECK-NEXT: $x11:{ 1 }
+ ; CHECK-NEXT: 2: $x10 = ADD $x10, $x11
+ ; CHECK-EMPTY:
+ ; CHECK-NEXT: $x10:{ 2 }
+ ; CHECK-NEXT: %stack.0:{ }
+ ; CHECK-NEXT: 3: SD $x10, %stack.0, 0 :: (store (s64))
+ ; CHECK-EMPTY:
+ ; CHECK-NEXT: %stack.0:{ 3 }
+ ; CHECK-NEXT: 4: $x10 = LD %stack.0, 0 :: (load (s64))
+ ; CHECK-EMPTY:
+ ; CHECK-NEXT: implicit $x10:{ 4 }
+ ; CHECK-NEXT: 5: PseudoRET implicit $x10
+
+ bb.0.entry:
+ $x10 = LD %stack.0, 0 :: (load (s64))
+ $x11 = LD %stack.1, 0 :: (load (s64))
+ $x10 = ADD $x10, $x11
+ SD $x10, %stack.0, 0 :: (store (s64))
+ $x10 = LD %stack.0, 0 :: (load (s64))
+ PseudoRET implicit $x10
+
+...
+---
+name: test3
+tracksRegLiveness: true
+stack:
+ - { id: 0, name: '', type: default, offset: 0, size: 4, alignment: 4,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+ debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+body: |
+ ; CHECK-LABEL: Reaching definitions for for machine function: test3
+ ; CHECK-NEXT: %bb.0:
+ ; CHECK-NEXT: $x10:{ livein }
+ ; CHECK-NEXT: $x0:{ }
+ ; CHECK-NEXT: 0: BEQ $x10, $x0, %bb.2
+ ; CHECK-EMPTY:
+ ; CHECK-NEXT: %bb.1:
+ ; CHECK-NEXT: $x10:{ livein }
+ ; CHECK-NEXT: 1: $x10 = ADDI $x10, 1
+ ; CHECK-EMPTY:
+ ; CHECK-NEXT: $x10:{ 1 }
+ ; CHECK-NEXT: %stack.0:{ }
+ ; CHECK-NEXT: 2: SD $x10, %stack.0, 0 :: (store (s64))
+ ; CHECK-EMPTY:
+ ; CHECK-NEXT: 3: PseudoBR %bb.3
+ ; CHECK-EMPTY:
+ ; CHECK-NEXT: %bb.2:
+ ; CHECK-NEXT: $x10:{ livein }
+ ; CHECK-NEXT: 4: $x10 = ADDI $x10, 2
+ ; CHECK-EMPTY:
+ ; CHECK-NEXT: $x10:{ 4 }
+ ; CHECK-NEXT: %stack.0:{ }
+ ; CHECK-NEXT: 5: SD $x10, %stack.0, 0 :: (store (s64))
+ ; CHECK-EMPTY:
+ ; CHECK-NEXT: %bb.3:
+ ; CHECK-NEXT: %stack.0:{ 2 5 }
+ ; CHECK-NEXT: 6: $x10 = LD %stack.0, 0 :: (load (s64))
+ ; CHECK-EMPTY:
+ ; CHECK-NEXT: implicit $x10:{ 6 }
+ ; CHECK-NEXT: 7: PseudoRET implicit $x10
+
+ bb.0.entry:
+ liveins: $x10
+ BEQ $x10, $x0, %bb.2
+
+ bb.1:
+ liveins: $x10
+ $x10 = ADDI $x10, 1
+ SD $x10, %stack.0, 0 :: (store (s64))
+ PseudoBR %bb.3
+
+ bb.2:
+ liveins: $x10
+ $x10 = ADDI $x10, 2
+ SD $x10, %stack.0, 0 :: (store (s64))
+
+ bb.3:
+ $x10 = LD %stack.0, 0 :: (load (s64))
+ PseudoRET implicit $x10
+...
+---
+name: test4
+tracksRegLiveness: true
+fixedStack:
+ - { id: 0, type: default, offset: 0, size: 4, alignment: 16,
+ isImmutable: true, isAliased: false }
+stack:
+ - { id: 0, name: '', type: default, offset: 0, size: 4, alignment: 4,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+ debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+ - { id: 1, name: '', type: default, offset: 0, size: 4, alignment: 4,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+ debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+body: |
+ ; CHECK-LABEL: Reaching definitions for for machine function: test4
+ ; CHECK-NEXT: %bb.0:
+ ; CHECK-NEXT: $x10:{ livein }
+ ; CHECK-NEXT: %stack.0:{ }
+ ; CHECK-NEXT: 0: SD $x10, %stack.0, 0 :: (store (s64))
+ ; CHECK-EMPTY:
+ ; CHECK-NEXT: $x11:{ livein }
+ ; CHECK-NEXT: %stack.0:{ 0 }
+ ; CHECK-NEXT: 1: SD $x11, %stack.0, 0 :: (store (s64))
+ ; CHECK-EMPTY:
+ ; CHECK-NEXT: $x10:{ livein }
+ ; CHECK-NEXT: %stack.1:{ }
+ ; CHECK-NEXT: 2: SD $x10, %stack.1, 0 :: (store (s64))
+ ; CHECK-EMPTY:
+ ; CHECK-NEXT: $x11:{ livein }
+ ; CHECK-NEXT: %stack.1:{ 2 }
+ ; CHECK-NEXT: 3: SD $x11, %stack.1, 0 :: (store (s64))
+ ; CHECK-EMPTY:
+ ; CHECK-NEXT: 4: PseudoRET
+ bb.0.entry:
+ liveins: $x10, $x11
+ SD $x10, %stack.0, 0 :: (store (s64))
+ SD $x11, %stack.0, 0 :: (store (s64))
+ SD $x10, %stack.1, 0 :: (store (s64))
+ SD $x11, %stack.1, 0 :: (store (s64))
+ PseudoRET
+...
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