[llvm] Try To Guess SGMasks for Inline Asm Instructions (PR #155491)
Patrick Simmons via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 21 08:50:08 PST 2026
================
@@ -2391,6 +2391,56 @@ bool SchedGroup::canAddMI(const MachineInstr &MI) const {
if (MI.isMetaInstruction())
Result = false;
+ else if (MI.isInlineAsm()) {
+ const SIRegisterInfo &TRI = TII->getRegisterInfo();
+ auto &MRI = MI.getParent()->getParent()->getRegInfo();
+ bool SGPR_used = false, VGPR_used = false, VMFMA_used = false,
+ VReg32_used = false, MayLoad = MI.mayLoad(), MayStore = MI.mayStore();
----------------
linuxrocks123 wrote:
This:
```
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp b/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
index 1524ca4d0705..db4ebde715ff 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
@@ -32,6 +32,8 @@ using namespace llvm;
namespace {
+LLVM_ENABLE_BITMASK_ENUMS_IN_NAMESPACE();
+
static cl::opt<bool> EnableExactSolver(
"amdgpu-igrouplp-exact-solver", cl::Hidden,
cl::desc("Whether to use the exponential time solver to fit "
@@ -2422,30 +2424,30 @@ bool SchedGroup::canAddMI(const MachineInstr &MI) const {
typedef std::underlying_type_t<SchedGroupMask> SGMask_t;
SGMask_t InlineAsmMask = 0;
if (VGPR_used && !VMFMA_used && !MayLoad && !MayStore)
- InlineAsmMask |= (SGMask_t)SchedGroupMask::VALU;
+ InlineAsmMask |= SchedGroupMask::VALU;
if (SGPR_used && !VGPR_used && !MayLoad && !MayStore)
- InlineAsmMask |= (SGMask_t)SchedGroupMask::SALU;
+ InlineAsmMask |= SchedGroupMask::SALU;
if (VMFMA_used)
- InlineAsmMask |= (SGMask_t)SchedGroupMask::MFMA;
+ InlineAsmMask |= SchedGroupMask::MFMA;
if (VGPR_used && MayLoad)
- InlineAsmMask |= (SGMask_t)(VReg32_used ? SchedGroupMask::DS_READ
+ InlineAsmMask |= (VReg32_used ? SchedGroupMask::DS_READ
: SchedGroupMask::VMEM_READ);
if (VGPR_used && MayStore)
- InlineAsmMask |= (SGMask_t)(VReg32_used ? SchedGroupMask::DS_WRITE
+ InlineAsmMask |= (VReg32_used ? SchedGroupMask::DS_WRITE
: SchedGroupMask::VMEM_WRITE);
if (SGPR_big_def)
- InlineAsmMask |= (SGMask_t)SchedGroupMask::DS_READ;
- if (InlineAsmMask & (SGMask_t)SchedGroupMask::VALU ||
- InlineAsmMask & (SGMask_t)SchedGroupMask::SALU)
- InlineAsmMask |= (SGMask_t)SchedGroupMask::ALU;
- if (InlineAsmMask & (SGMask_t)SchedGroupMask::DS_READ ||
- InlineAsmMask & (SGMask_t)SchedGroupMask::DS_WRITE)
- InlineAsmMask |= (SGMask_t)SchedGroupMask::DS;
- if (InlineAsmMask & (SGMask_t)SchedGroupMask::VMEM_READ ||
- InlineAsmMask & (SGMask_t)SchedGroupMask::VMEM_WRITE)
- InlineAsmMask |= (SGMask_t)SchedGroupMask::VMEM;
-
- Result = ((SGMask_t)SGMask & InlineAsmMask) != 0;
+ InlineAsmMask |= SchedGroupMask::DS_READ;
+ if (InlineAsmMask & SchedGroupMask::VALU ||
+ InlineAsmMask & SchedGroupMask::SALU)
+ InlineAsmMask |= SchedGroupMask::ALU;
+ if (InlineAsmMask & SchedGroupMask::DS_READ ||
+ InlineAsmMask & SchedGroupMask::DS_WRITE)
+ InlineAsmMask |= SchedGroupMask::DS;
+ if (InlineAsmMask & SchedGroupMask::VMEM_READ ||
+ InlineAsmMask & SchedGroupMask::VMEM_WRITE)
+ InlineAsmMask |= SchedGroupMask::VMEM;
+
+ Result = (SGMask & InlineAsmMask) != 0;
}
```
Results in this:
```
/home/psimmons/work/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp: In member function ‘bool {anonymous}::SchedGroup::canAddMI(const llvm::MachineInstr&) const’:
/home/psimmons/work/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp:2427:21: error: no match for ‘operator|=’ (operand types are ‘SGMask_t’ {aka ‘int’} and ‘{anonymous}::SchedGroupMask’)
2427 | InlineAsmMask |= SchedGroupMask::VALU;
| ~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~
/home/psimmons/work/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp:2429:21: error: no match for ‘operator|=’ (operand types are ‘SGMask_t’ {aka ‘int’} and ‘{anonymous}::SchedGroupMask’)
2429 | InlineAsmMask |= SchedGroupMask::SALU;
| ~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~
/home/psimmons/work/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp:2431:21: error: no match for ‘operator|=’ (operand types are ‘SGMask_t’ {aka ‘int’} and ‘{anonymous}::SchedGroupMask’)
2431 | InlineAsmMask |= SchedGroupMask::MFMA;
| ~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~
/home/psimmons/work/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp:2433:21: error: no match for ‘operator|=’ (operand types are ‘SGMask_t’ {aka ‘int’} and ‘{anonymous}::SchedGroupMask’)
2433 | InlineAsmMask |= (VReg32_used ? SchedGroupMask::DS_READ
| ~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2434 | : SchedGroupMask::VMEM_READ);
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/psimmons/work/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp:2436:21: error: no match for ‘operator|=’ (operand types are ‘SGMask_t’ {aka ‘int’} and ‘{anonymous}::SchedGroupMask’)
2436 | InlineAsmMask |= (VReg32_used ? SchedGroupMask::DS_WRITE
| ~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2437 | : SchedGroupMask::VMEM_WRITE);
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/psimmons/work/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp:2439:21: error: no match for ‘operator|=’ (operand types are ‘SGMask_t’ {aka ‘int’} and ‘{anonymous}::SchedGroupMask’)
2439 | InlineAsmMask |= SchedGroupMask::DS_READ;
| ~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
/home/psimmons/work/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp:2440:23: error: no match for ‘operator&’ (operand types are ‘SGMask_t’ {aka ‘int’} and ‘{anonymous}::SchedGroupMask’)
2440 | if (InlineAsmMask & SchedGroupMask::VALU ||
| ~~~~~~~~~~~~~ ^ ~~~~~~~~~~~~~~~~~~~~
| | |
| SGMask_t {aka int} {anonymous}::SchedGroupMask
/home/psimmons/work/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp:2441:23: error: no match for ‘operator&’ (operand types are ‘SGMask_t’ {aka ‘int’} and ‘{anonymous}::SchedGroupMask’)
2441 | InlineAsmMask & SchedGroupMask::SALU)
| ~~~~~~~~~~~~~ ^ ~~~~~~~~~~~~~~~~~~~~
| | |
| SGMask_t {aka int} {anonymous}::SchedGroupMask
/home/psimmons/work/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp:2442:21: error: no match for ‘operator|=’ (operand types are ‘SGMask_t’ {aka ‘int’} and ‘{anonymous}::SchedGroupMask’)
2442 | InlineAsmMask |= SchedGroupMask::ALU;
| ~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~
/home/psimmons/work/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp:2443:23: error: no match for ‘operator&’ (operand types are ‘SGMask_t’ {aka ‘int’} and ‘{anonymous}::SchedGroupMask’)
2443 | if (InlineAsmMask & SchedGroupMask::DS_READ ||
| ~~~~~~~~~~~~~ ^ ~~~~~~~~~~~~~~~~~~~~~~~
| | |
| SGMask_t {aka int} {anonymous}::SchedGroupMask
/home/psimmons/work/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp:2444:23: error: no match for ‘operator&’ (operand types are ‘SGMask_t’ {aka ‘int’} and ‘{anonymous}::SchedGroupMask’)
2444 | InlineAsmMask & SchedGroupMask::DS_WRITE)
| ~~~~~~~~~~~~~ ^ ~~~~~~~~~~~~~~~~~~~~~~~~
| | |
| SGMask_t {aka int} {anonymous}::SchedGroupMask
/home/psimmons/work/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp:2445:21: error: no match for ‘operator|=’ (operand types are ‘SGMask_t’ {aka ‘int’} and ‘{anonymous}::SchedGroupMask’)
2445 | InlineAsmMask |= SchedGroupMask::DS;
| ~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~
/home/psimmons/work/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp:2446:23: error: no match for ‘operator&’ (operand types are ‘SGMask_t’ {aka ‘int’} and ‘{anonymous}::SchedGroupMask’)
2446 | if (InlineAsmMask & SchedGroupMask::VMEM_READ ||
| ~~~~~~~~~~~~~ ^ ~~~~~~~~~~~~~~~~~~~~~~~~~
| | |
| SGMask_t {aka int} {anonymous}::SchedGroupMask
/home/psimmons/work/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp:2447:23: error: no match for ‘operator&’ (operand types are ‘SGMask_t’ {aka ‘int’} and ‘{anonymous}::SchedGroupMask’)
2447 | InlineAsmMask & SchedGroupMask::VMEM_WRITE)
| ~~~~~~~~~~~~~ ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~
| | |
| SGMask_t {aka int} {anonymous}::SchedGroupMask
/home/psimmons/work/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp:2448:21: error: no match for ‘operator|=’ (operand types are ‘SGMask_t’ {aka ‘int’} and ‘{anonymous}::SchedGroupMask’)
2448 | InlineAsmMask |= SchedGroupMask::VMEM;
| ~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~
/home/psimmons/work/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp:2450:22: error: no match for ‘operator&’ (operand types are ‘const {anonymous}::SchedGroupMask’ and ‘SGMask_t’ {aka ‘int’})
2450 | Result = (SGMask & InlineAsmMask) != 0;
| ~~~~~~ ^ ~~~~~~~~~~~~~
| | |
| | SGMask_t {aka int}
| const {anonymous}::SchedGroupMask
```
I therefore do not believe it is possible to avoid these casts.
https://github.com/llvm/llvm-project/pull/155491
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