[llvm] [PPC] Fix suspicious AltiVec VAVG patterns (PR #176891)

[via llvm-commits]

================
@@ -2,136 +2,154 @@
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 < %s | FileCheck -check-prefix=CHECK-P9 %s
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck -check-prefix=CHECK-P8 %s
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr7 < %s | FileCheck -check-prefix=CHECK-P7 %s
+
 define <8 x i16> @test_v8i16(<8 x i16> %m, <8 x i16> %n) {
 ; CHECK-P9-LABEL: test_v8i16:
 ; CHECK-P9:       # %bb.0: # %entry
-; CHECK-P9-NEXT:    vavguh 2, 3, 2
+; CHECK-P9-NEXT:    vavguh 2, 2, 3
 ; CHECK-P9-NEXT:    blr
 ;
 ; CHECK-P8-LABEL: test_v8i16:
 ; CHECK-P8:       # %bb.0: # %entry
-; CHECK-P8-NEXT:    vavguh 2, 3, 2
+; CHECK-P8-NEXT:    vavguh 2, 2, 3
 ; CHECK-P8-NEXT:    blr
 ;
 ; CHECK-P7-LABEL: test_v8i16:
 ; CHECK-P7:       # %bb.0: # %entry
-; CHECK-P7-NEXT:    vavguh 2, 3, 2
+; CHECK-P7-NEXT:    vavguh 2, 2, 3
 ; CHECK-P7-NEXT:    blr
 entry:
-  %add = add <8 x i16> %m, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
-  %add1 = add <8 x i16> %add, %n
-  %shr = lshr <8 x i16> %add1, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
-  ret <8 x i16> %shr
+  %xm = zext <8 x i16> %m to <8 x i17>
----------------
RolandF77 wrote:

Shouldn't this be i18? ISDOpcodes.h says compute in i[N+2] for AVGCEIL. Same issue for similar tests.

https://github.com/llvm/llvm-project/pull/176891