[llvm] [NVPTX][AtomicExpandPass] Complete support for AtomicRMW in NVPTX (PR #176015)

[via llvm-commits]

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@@ -7065,65 +7065,97 @@ NVPTXTargetLowering::shouldExpandAtomicRMWInIR(const AtomicRMWInst *AI) const {
 
 bool NVPTXTargetLowering::shouldInsertFencesForAtomic(
     const Instruction *I) const {
-  auto *CI = dyn_cast<AtomicCmpXchgInst>(I);
   // When CAS bitwidth is not supported on the hardware, the CAS is emulated
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gonzalobg wrote:

```suggestion
```

https://github.com/llvm/llvm-project/pull/176015