[llvm] [AMDGPU] Remove target feature `DumpCode` and `DumpCodeLower` (PR #176960)

Shilei Tian via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 20 08:28:10 PST 2026


https://github.com/shiltian created https://github.com/llvm/llvm-project/pull/176960

None

>From dbf2edf15946385bacf913321211f60568626ed5 Mon Sep 17 00:00:00 2001
From: Shilei Tian <i at tianshilei.me>
Date: Tue, 20 Jan 2026 11:27:02 -0500
Subject: [PATCH] [AMDGPU] Remove target feature `DumpCode` and `DumpCodeLower`

---
 llvm/lib/Target/AMDGPU/AMDGPU.td             | 12 ------
 llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp  | 40 --------------------
 llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h    |  2 -
 llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 29 --------------
 llvm/lib/Target/AMDGPU/GCNSubtarget.h        |  5 ---
 llvm/test/CodeGen/AMDGPU/debug.ll            | 12 ------
 llvm/test/CodeGen/AMDGPU/dumpcode.ll         | 30 ---------------
 7 files changed, 130 deletions(-)
 delete mode 100644 llvm/test/CodeGen/AMDGPU/debug.ll
 delete mode 100644 llvm/test/CodeGen/AMDGPU/dumpcode.ll

diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td
index 4eb192b3726b4..c9c4dab222ca8 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.td
@@ -1322,18 +1322,6 @@ def FeatureMaxPrivateElementSize4 : FeatureMaxPrivateElementSize<4>;
 def FeatureMaxPrivateElementSize8 : FeatureMaxPrivateElementSize<8>;
 def FeatureMaxPrivateElementSize16 : FeatureMaxPrivateElementSize<16>;
 
-def FeatureDumpCode : SubtargetFeature <"DumpCode",
-  "DumpCode",
-  "true",
-  "Dump MachineInstrs in the CodeEmitter"
->;
-
-def FeatureDumpCodeLower : SubtargetFeature <"dumpcode",
-  "DumpCode",
-  "true",
-  "Dump MachineInstrs in the CodeEmitter"
->;
-
 // XXX - This should probably be removed once enabled by default
 def FeatureEnableLoadStoreOpt : SubtargetFeature <"load-store-opt",
   "EnableLoadStoreOpt",
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
index d0c86a785cc3d..cc85eb65fb59b 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -279,25 +279,11 @@ void AMDGPUAsmPrinter::emitFunctionEntryLabel() {
     getTargetStreamer()->EmitAMDGPUSymbolType(
         SymbolName, ELF::STT_AMDGPU_HSA_KERNEL);
   }
-  if (DumpCodeInstEmitter) {
-    // Disassemble function name label to text.
-    DisasmLines.push_back(MF->getName().str() + ":");
-    DisasmLineMaxLen = std::max(DisasmLineMaxLen, DisasmLines.back().size());
-    HexLines.emplace_back("");
-  }
 
   AsmPrinter::emitFunctionEntryLabel();
 }
 
 void AMDGPUAsmPrinter::emitBasicBlockStart(const MachineBasicBlock &MBB) {
-  if (DumpCodeInstEmitter && !isBlockOnlyReachableByFallthrough(&MBB)) {
-    // Write a line for the basic block label if it is not only fallthrough.
-    DisasmLines.push_back(
-        (Twine("BB") + Twine(getFunctionNumber())
-         + "_" + Twine(MBB.getNumber()) + ":").str());
-    DisasmLineMaxLen = std::max(DisasmLineMaxLen, DisasmLines.back().size());
-    HexLines.emplace_back("");
-  }
   AsmPrinter::emitBasicBlockStart(MBB);
 }
 
@@ -715,15 +701,6 @@ bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
     EmitProgramInfoSI(MF, CurrentProgramInfo);
   }
 
-  DumpCodeInstEmitter = nullptr;
-  if (STM.dumpCode()) {
-    // For -dumpcode, get the assembler out of the streamer. This only works
-    // with -filetype=obj.
-    MCAssembler *Assembler = OutStreamer->getAssemblerPtr();
-    if (Assembler)
-      DumpCodeInstEmitter = Assembler->getEmitterPtr();
-  }
-
   DisasmLines.clear();
   HexLines.clear();
   DisasmLineMaxLen = 0;
@@ -888,23 +865,6 @@ bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
     }
   }
 
-  if (DumpCodeInstEmitter) {
-
-    OutStreamer->switchSection(
-        Context.getELFSection(".AMDGPU.disasm", ELF::SHT_PROGBITS, 0));
-
-    for (size_t i = 0; i < DisasmLines.size(); ++i) {
-      std::string Comment = "\n";
-      if (!HexLines[i].empty()) {
-        Comment = std::string(DisasmLineMaxLen - DisasmLines[i].size(), ' ');
-        Comment += " ; " + HexLines[i] + "\n";
-      }
-
-      OutStreamer->emitBytes(StringRef(DisasmLines[i]));
-      OutStreamer->emitBytes(StringRef(Comment));
-    }
-  }
-
   return false;
 }
 
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
index 9e854fa554672..33ceb805d6da0 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
@@ -52,8 +52,6 @@ class AMDGPUAsmPrinter final : public AsmPrinter {
 
   std::unique_ptr<AMDGPU::HSAMD::MetadataStreamer> HSAMetadataStream;
 
-  MCCodeEmitter *DumpCodeInstEmitter = nullptr;
-
   // When appropriate, add a _dvgpr$ symbol.
   void emitDVgprSymbol(MachineFunction &MF);
 
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp b/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
index 99c1ab8d379d5..864352a3258de 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
@@ -454,34 +454,5 @@ void AMDGPUAsmPrinter::emitInstruction(const MachineInstr *MI) {
       assert(CodeBytes.size() == STI.getInstrInfo()->getInstSizeInBytes(*MI));
     }
 #endif
-
-    if (DumpCodeInstEmitter) {
-      // Disassemble instruction/operands to text
-      DisasmLines.resize(DisasmLines.size() + 1);
-      std::string &DisasmLine = DisasmLines.back();
-      raw_string_ostream DisasmStream(DisasmLine);
-
-      AMDGPUInstPrinter InstPrinter(*TM.getMCAsmInfo(), *STI.getInstrInfo(),
-                                    *STI.getRegisterInfo());
-      InstPrinter.printInst(&TmpInst, 0, StringRef(), STI, DisasmStream);
-
-      // Disassemble instruction/operands to hex representation.
-      SmallVector<MCFixup, 4> Fixups;
-      SmallVector<char, 16> CodeBytes;
-
-      DumpCodeInstEmitter->encodeInstruction(
-          TmpInst, CodeBytes, Fixups, MF->getSubtarget<MCSubtargetInfo>());
-      HexLines.resize(HexLines.size() + 1);
-      std::string &HexLine = HexLines.back();
-      raw_string_ostream HexStream(HexLine);
-
-      for (size_t i = 0; i < CodeBytes.size(); i += 4) {
-        unsigned int CodeDWord =
-            support::endian::read32le(CodeBytes.data() + i);
-        HexStream << format("%s%08X", (i > 0 ? " " : ""), CodeDWord);
-      }
-
-      DisasmLineMaxLen = std::max(DisasmLineMaxLen, DisasmLine.size());
-    }
   }
 }
diff --git a/llvm/lib/Target/AMDGPU/GCNSubtarget.h b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
index b60297163f43b..6f085d020b723 100644
--- a/llvm/lib/Target/AMDGPU/GCNSubtarget.h
+++ b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
@@ -97,7 +97,6 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
   bool EnableSIScheduler = false;
   bool EnableDS128 = false;
   bool EnablePRTStrictNull = false;
-  bool DumpCode = false;
   bool AssemblerPermissiveWavesize = false;
 
   // Subtarget statically properties set by tablegen
@@ -545,10 +544,6 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
     return getGeneration() <= SEA_ISLANDS ? 1 : 2;
   }
 
-  bool dumpCode() const {
-    return DumpCode;
-  }
-
   /// Return the amount of LDS that can be used that will not restrict the
   /// occupancy lower than WaveCount.
   unsigned getMaxLocalMemSizeWithWaveCount(unsigned WaveCount,
diff --git a/llvm/test/CodeGen/AMDGPU/debug.ll b/llvm/test/CodeGen/AMDGPU/debug.ll
deleted file mode 100644
index 99200767ed736..0000000000000
--- a/llvm/test/CodeGen/AMDGPU/debug.ll
+++ /dev/null
@@ -1,12 +0,0 @@
-; RUN: llc < %s -mtriple=amdgcn -mcpu=verde -mattr=dumpcode -filetype=obj | FileCheck --check-prefix=SI %s
-; RUN: llc < %s -mtriple=amdgcn -mcpu=tonga -mattr=dumpcode -filetype=obj | FileCheck --check-prefix=SI %s
-
-; Test for a crash in the custom assembly dump code.
-
-; SI: test:
-; SI: BB0_0:
-; SI: s_endpgm
-define amdgpu_kernel void @test(ptr addrspace(1) %out) {
-  store i32 0, ptr addrspace(1) %out
-  ret void
-}
diff --git a/llvm/test/CodeGen/AMDGPU/dumpcode.ll b/llvm/test/CodeGen/AMDGPU/dumpcode.ll
deleted file mode 100644
index 1acec2997aa8f..0000000000000
--- a/llvm/test/CodeGen/AMDGPU/dumpcode.ll
+++ /dev/null
@@ -1,30 +0,0 @@
-; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -mattr=dumpcode -filetype=obj < %s | llvm-objcopy --dump-section .AMDGPU.disasm=- - /dev/null | FileCheck %s -check-prefix=GFX10
-
-; GFX10: f:
-; GFX10-NEXT: BB0_0:
-; GFX10-NEXT:   s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; BF8C0000
-; GFX10-NEXT:   v_mov_b32_e32 v3, 0xde                  ; 7E0602FF 000000DE
-; GFX10-NEXT:   v_add_nc_u32_e32 v2, 1, v4              ; 4A040881
-; GFX10-NEXT:   s_mov_b32 s4, 0                         ; BE840380
-; GFX10-NEXT:   global_store_dword v[0:1], v3, off      ; DC708000 007D0300
-; GFX10-NEXT: BB0_1:
-; GFX10-NEXT:   v_add_nc_u32_e32 v2, -1, v2             ; 4A0404C1
-; GFX10-NEXT:   v_cmp_eq_u32_e32 vcc_lo, 0, v2          ; 7D840480
-; GFX10-NEXT:   s_or_b32 s4, vcc_lo, s4                 ; 8804046A
-; GFX10-NEXT:   s_andn2_b32 exec_lo, exec_lo, s4        ; 8A7E047E
-; GFX10-NEXT:   s_cbranch_execnz ""                     ; BF890000
-; GFX10-NEXT:   s_or_b32 exec_lo, exec_lo, s4           ; 887E047E
-; GFX10-NEXT:   s_setpc_b64 s[30:31]                    ; BE80201E
-
-define void @f(ptr addrspace(1) %out, ptr addrspace(1) %in, i32 %val) {
-entry:
-  br label %body
-body:
-  %i = phi i32 [0, %entry], [%inc, %body]
-  store i32 222, ptr addrspace(1) %out
-  %cmp = icmp ne i32 %i, %val
-  %inc = add i32 %i, 1
-  br i1 %cmp, label %body, label %end
-end:
-  ret void
-}



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