[llvm] [AMDGPU]Try to simplify select v32i4 case by legalizing v16i4 (PR #173328)

[Matt Arsenault via llvm-commits]

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@@ -16976,20 +16976,16 @@ SDValue SITargetLowering::performClampCombine(SDNode *N,
   return SDValue(CSrc, 0);
 }
 
-SDValue SITargetLowering::performSelectCombine(SDNode *N,
-                                               DAGCombinerInfo &DCI) const {
-
-  // Try to fold CMP + SELECT patterns with shared constants (both FP and
-  // integer).
-  // Detect when CMP and SELECT use the same constant and fold them to avoid
-  // loading the constant twice. Specifically handles patterns like:
-  // %cmp = icmp eq i32 %val, 4242
-  // %sel = select i1 %cmp, i32 4242, i32 %other
-  // It can be optimized to reuse %val instead of 4242 in select.
-  SDValue Cond = N->getOperand(0);
-  SDValue TrueVal = N->getOperand(1);
-  SDValue FalseVal = N->getOperand(2);
-
+// Try to fold CMP + SELECT patterns with shared constants (both FP and
+// integer).
+// Detect when CMP and SELECT use the same constant and fold them to avoid
+// loading the constant twice. Specifically handles patterns like:
+// %cmp = icmp eq i32 %val, 4242
+// %sel = select i1 %cmp, i32 4242, i32 %other
+// It can be optimized to reuse %val instead of 4242 in select.
+SDValue SITargetLowering::foldShareConstSelect(SDNode *N, DAGCombinerInfo &DCI,
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arsenm wrote:

Can this move to the generic dag combiner? 

https://github.com/llvm/llvm-project/pull/173328