[llvm] [AArch64][GlobalISel] Extend smaller than i32 gpr loads/stores in RegBankSelect. (PR #175810)
David Green via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 20 06:04:28 PST 2026
================
@@ -364,9 +364,33 @@ void AArch64RegisterBankInfo::applyMappingImpl(
MachineRegisterInfo &MRI = OpdMapper.getMRI();
switch (MI.getOpcode()) {
+ case TargetOpcode::G_STORE: {
+ Register Dst = MI.getOperand(0).getReg();
+ LLT Ty = MRI.getType(Dst);
+ if (MRI.getRegBank(Dst) == &AArch64::GPRRegBank && Ty.isScalar() &&
+ Ty.getSizeInBits() < 32) {
+ Builder.setInsertPt(*MI.getParent(), MI.getIterator());
+ auto Ext = Builder.buildAnyExt(LLT::scalar(32), Dst);
+ MI.getOperand(0).setReg(Ext.getReg(0));
----------------
davemgreen wrote:
Hi - Sorry I missed that point. I don't see a change observer in RegBankSelect or AArch64RegisterBankInfo. (There is one in AMDGPURegBankSelect).
https://github.com/llvm/llvm-project/pull/175810
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