[llvm] [AArch64] Fix register check in ConditionOptimizer cross-block logic (PR #176528)

[David Green via llvm-commits]

https://github.com/davemgreen commented:

You can use virtual register for the test, as in something like https://godbolt.org/z/GTPh6o5c5 if you can try and keep it small, like the one you have. Usually that looks like `%0 = COPY w0`, then use `%0` in the instruction.
In the commit message you call thing a bug, but if the registers do not match CSE will not remove any duplicates, so no miscompile should occur AFAIU. We just change it to a different equivalent representation, and this patch is preventing it from performing an unhelpful/unnecessary optimization. It would be good to make that more clear so that people don't think there are miscompiles fixed in this patch, unless there is something I am missing? Whether that makes things bigger or smaller overall will be random and depend on what else the instructions might be able to CSE with.


https://github.com/llvm/llvm-project/pull/176528