[llvm] [ReachingDefAnalysis] Fix printing of RDA results. (PR #176474)

[Mikhail Gudim via llvm-commits]

https://github.com/mgudim updated https://github.com/llvm/llvm-project/pull/176474

>From 30a885afa59b9285d8de60d9a1b5d4e40e24ec5a Mon Sep 17 00:00:00 2001
From: Mikhail Gudim <mgudim at qti.qualcomm.com>
Date: Fri, 16 Jan 2026 13:10:50 -0800
Subject: [PATCH] [ReachingDefAnalysis] Fix printing of analysis results.

Sometimes RDA results were adding a wrong `0` to the output. This is
because a map lookup was failing and returning a default value of `0`.
---
 llvm/lib/CodeGen/ReachingDefAnalysis.cpp           | 3 +++
 llvm/test/CodeGen/RISCV/rda-entry-bb-is-a-loop.mir | 3 ---
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/CodeGen/ReachingDefAnalysis.cpp b/llvm/lib/CodeGen/ReachingDefAnalysis.cpp
index 82374110406ff..c8ffaf2920023 100644
--- a/llvm/lib/CodeGen/ReachingDefAnalysis.cpp
+++ b/llvm/lib/CodeGen/ReachingDefAnalysis.cpp
@@ -293,6 +293,9 @@ void ReachingDefInfo::run(MachineFunction &mf) {
 }
 
 void ReachingDefInfo::print(raw_ostream &OS) {
+  // Create a map from instruction to numerical ids.
+  // Since a reaching def can come after instruction,
+  // this map needs to be populated first.
   int Num = 0;
   DenseMap<MachineInstr *, int> InstToNumMap;
   SmallPtrSet<MachineInstr *, 2> Defs;
diff --git a/llvm/test/CodeGen/RISCV/rda-entry-bb-is-a-loop.mir b/llvm/test/CodeGen/RISCV/rda-entry-bb-is-a-loop.mir
index e3cfc3041b3a6..0f56e90a28e51 100644
--- a/llvm/test/CodeGen/RISCV/rda-entry-bb-is-a-loop.mir
+++ b/llvm/test/CodeGen/RISCV/rda-entry-bb-is-a-loop.mir
@@ -1,7 +1,4 @@
 # RUN: llc %s -mtriple=riscv64 --passes='print<reaching-def>'  -o - 2>&1 | FileCheck %s
-# XFAIL: *
-
-#TODO: Currently RDA incorrectly prints that `$x10` defs reaching instruction `0` are `{ 0  }` but it should be `{ 1 }`.
 ---
 name:            entry_bb_is_a_loop
 tracksRegLiveness: true