[llvm] Implement MIR serialization support for prefetch targets. (PR #176484)
Rahman Lavaee via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 16 14:05:22 PST 2026
https://github.com/rlavaee created https://github.com/llvm/llvm-project/pull/176484
The implementation includes:
- A new token in the MIR lexer.
- Parsing logic to handle the attribute.
- Serialization logic to write the attribute.
- A new test case to verify the correct serialization and parsing of this attribute.
>From fa5b226b4914613d0e37fec8d2ce0b976be6f5a9 Mon Sep 17 00:00:00 2001
From: Rahman Lavaee <rahmanl at google.com>
Date: Fri, 16 Jan 2026 22:01:40 +0000
Subject: [PATCH 1/2] feat(MIR): Implement serialization for
PrefetchTargetCallsiteIndexes
This commit introduces MIR serialization and parsing for the field in .
The implementation includes:
- A new token in the MIR lexer.
- Parsing logic in to handle the attribute.
- Serialization logic in to write the attribute.
- A new test case to verify the correct serialization and parsing of this attribute.
---
llvm/include/llvm/CodeGen/MachineBasicBlock.h | 4 +--
llvm/lib/CodeGen/MIRParser/MILexer.cpp | 1 +
llvm/lib/CodeGen/MIRParser/MILexer.h | 1 +
llvm/lib/CodeGen/MIRParser/MIParser.cpp | 25 +++++++++++++++++++
llvm/lib/CodeGen/MIRPrinter.cpp | 11 ++++++++
.../CodeGen/MIR/Generic/prefetch-targets.mir | 23 +++++++++++++++++
6 files changed, 63 insertions(+), 2 deletions(-)
create mode 100644 llvm/test/CodeGen/MIR/Generic/prefetch-targets.mir
diff --git a/llvm/include/llvm/CodeGen/MachineBasicBlock.h b/llvm/include/llvm/CodeGen/MachineBasicBlock.h
index d7d610c11668c..94e1c6cc49189 100644
--- a/llvm/include/llvm/CodeGen/MachineBasicBlock.h
+++ b/llvm/include/llvm/CodeGen/MachineBasicBlock.h
@@ -722,8 +722,8 @@ class MachineBasicBlock
return PrefetchTargetCallsiteIndexes;
}
- void setPrefetchTargetCallsiteIndexes(const SmallVector<unsigned> &V) {
- PrefetchTargetCallsiteIndexes = V;
+ void setPrefetchTargetCallsiteIndexes(ArrayRef<unsigned> V) {
+ PrefetchTargetCallsiteIndexes.assign(V.begin(), V.end());
}
/// Returns the section ID of this basic block.
diff --git a/llvm/lib/CodeGen/MIRParser/MILexer.cpp b/llvm/lib/CodeGen/MIRParser/MILexer.cpp
index f9852c6c889b8..5545ac34651f6 100644
--- a/llvm/lib/CodeGen/MIRParser/MILexer.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MILexer.cpp
@@ -275,6 +275,7 @@ static MIToken::TokenKind getIdentifierKind(StringRef Identifier) {
.Case("ehfunclet-entry", MIToken::kw_ehfunclet_entry)
.Case("liveins", MIToken::kw_liveins)
.Case("successors", MIToken::kw_successors)
+ .Case("prefetch-targets", MIToken::kw_prefetch_targets)
.Case("floatpred", MIToken::kw_floatpred)
.Case("intpred", MIToken::kw_intpred)
.Case("shufflemask", MIToken::kw_shufflemask)
diff --git a/llvm/lib/CodeGen/MIRParser/MILexer.h b/llvm/lib/CodeGen/MIRParser/MILexer.h
index a9dc9af6858da..af32cfd81ebec 100644
--- a/llvm/lib/CodeGen/MIRParser/MILexer.h
+++ b/llvm/lib/CodeGen/MIRParser/MILexer.h
@@ -130,6 +130,7 @@ struct MIToken {
kw_ehfunclet_entry,
kw_liveins,
kw_successors,
+ kw_prefetch_targets,
kw_floatpred,
kw_intpred,
kw_shufflemask,
diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
index baac77fbd2dc0..e3f98ea342932 100644
--- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -447,6 +447,7 @@ class MIParser {
MachineBasicBlock *&AddFalthroughFrom);
bool parseBasicBlockLiveins(MachineBasicBlock &MBB);
bool parseBasicBlockSuccessors(MachineBasicBlock &MBB);
+ bool parseBasicBlockPrefetchTargets(MachineBasicBlock &MBB);
bool parseNamedRegister(Register &Reg);
bool parseVirtualRegister(VRegInfo *&Info);
@@ -926,6 +927,27 @@ bool MIParser::parseBasicBlockSuccessors(MachineBasicBlock &MBB) {
return false;
}
+bool MIParser::parseBasicBlockPrefetchTargets(MachineBasicBlock &MBB) {
+ assert(Token.is(MIToken::kw_prefetch_targets));
+ lex();
+ if (expectAndConsume(MIToken::colon))
+ return true;
+ if (Token.isNewlineOrEOF()) // Allow an empty list.
+ return false;
+ SmallVector<unsigned> PrefetchTargets;
+ do {
+ if (Token.isNot(MIToken::IntegerLiteral))
+ return error("expected an integer literal");
+ unsigned Index;
+ if (getUnsigned(Index))
+ return true;
+ PrefetchTargets.push_back(Index);
+ lex();
+ } while (consumeIfPresent(MIToken::comma));
+ MBB.setPrefetchTargetCallsiteIndexes(PrefetchTargets);
+ return false;
+}
+
bool MIParser::parseBasicBlock(MachineBasicBlock &MBB,
MachineBasicBlock *&AddFalthroughFrom) {
// Skip the definition.
@@ -956,6 +978,9 @@ bool MIParser::parseBasicBlock(MachineBasicBlock &MBB,
} else if (Token.is(MIToken::kw_liveins)) {
if (parseBasicBlockLiveins(MBB))
return true;
+ } else if (Token.is(MIToken::kw_prefetch_targets)) {
+ if (parseBasicBlockPrefetchTargets(MBB))
+ return true;
} else if (consumeIfPresent(MIToken::Newline)) {
continue;
} else
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index 9a48a0062549a..dbc9ba299d61e 100644
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -771,6 +771,17 @@ void printMBB(raw_ostream &OS, MFPrintState &State,
HasLineAttributes = true;
}
+ // Print prefetch targets
+ if (!MBB.getPrefetchTargetCallsiteIndexes().empty()) {
+ OS.indent(2) << "prefetch-targets: ";
+ ListSeparator LS;
+ for (unsigned I : MBB.getPrefetchTargetCallsiteIndexes()) {
+ OS << LS << I;
+ }
+ OS << "\n";
+ HasLineAttributes = true;
+ }
+
if (HasLineAttributes && !MBB.empty())
OS << "\n";
bool IsInBundle = false;
diff --git a/llvm/test/CodeGen/MIR/Generic/prefetch-targets.mir b/llvm/test/CodeGen/MIR/Generic/prefetch-targets.mir
new file mode 100644
index 0000000000000..8fee5619969b3
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/Generic/prefetch-targets.mir
@@ -0,0 +1,23 @@
+# RUN: llc -run-pass none -o - %s | FileCheck %s
+# This test ensures that the MIR parser parses the prefetch-targets attribute
+# correctly.
+
+--- |
+
+ define void @prefetch() {
+ entry:
+ ret void
+ }
+
+...
+---
+# CHECK-LABEL: name: prefetch
+# CHECK: bb.0.entry:
+# CHECK-NEXT: liveins: $edi
+# CHECK-NEXT: prefetch-targets: 0, 1, 2
+name: prefetch
+body: |
+ bb.0.entry:
+ prefetch-targets: 0, 1, 2
+ liveins: $edi
+...
>From 392ffd23d521c68f5d9ae8cad27d1cdb575bd691 Mon Sep 17 00:00:00 2001
From: Rahman Lavaee <rahmanl at google.com>
Date: Fri, 16 Jan 2026 22:02:10 +0000
Subject: [PATCH 2/2] clang-format.
---
llvm/lib/CodeGen/MIRPrinter.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index dbc9ba299d61e..9518f2d58cb2a 100644
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -776,7 +776,7 @@ void printMBB(raw_ostream &OS, MFPrintState &State,
OS.indent(2) << "prefetch-targets: ";
ListSeparator LS;
for (unsigned I : MBB.getPrefetchTargetCallsiteIndexes()) {
- OS << LS << I;
+ OS << LS << I;
}
OS << "\n";
HasLineAttributes = true;
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