[llvm] 735a972 - [AMDGPU] Make VOP_SDWA_Pseudo inherit from VOP_Pseudo (#176209)

[via llvm-commits]

Author: Joe Nash
Date: 2026-01-16T11:56:56-05:00
New Revision: 735a972253c21fbbe4d04fc6578c72fb6492dc93

URL: https://github.com/llvm/llvm-project/commit/735a972253c21fbbe4d04fc6578c72fb6492dc93
DIFF: https://github.com/llvm/llvm-project/commit/735a972253c21fbbe4d04fc6578c72fb6492dc93.diff

LOG: [AMDGPU] Make VOP_SDWA_Pseudo inherit from VOP_Pseudo (#176209)

NFC. Tablegen change makes it easier to add fields to VOP_Pseudo

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/VOPInstructions.td

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/VOPInstructions.td b/llvm/lib/Target/AMDGPU/VOPInstructions.td
index 39a202dc9c379..4f194dfb6a312 100644
--- a/llvm/lib/Target/AMDGPU/VOPInstructions.td
+++ b/llvm/lib/Target/AMDGPU/VOPInstructions.td
@@ -770,16 +770,9 @@ class VOP_SDWA9Be<VOPProfile P> : VOP_SDWA9e<P> {
 }
 
 class VOP_SDWA_Pseudo <string opName, VOPProfile P, list<dag> pattern=[]> :
-  InstSI <P.OutsSDWA, P.InsSDWA, "", pattern>,
-  VOP <opName>,
-  SIMCInstr <opName#"_sdwa", SIEncodingFamily.NONE> {
-
-  let isPseudo = 1;
-  let isCodeGenOnly = 1;
-  let UseNamedOperandTable = 1;
+  VOP_Pseudo <opName, "_sdwa", P, P.OutsSDWA, P.InsSDWA, "", pattern> {
 
-  string Mnemonic = opName;
-  string AsmOperands = P.AsmSDWA;
+  let AsmOperands = P.AsmSDWA;
   string AsmOperands9 = P.AsmSDWA9;
 
   let Size = 8;
@@ -799,8 +792,6 @@ class VOP_SDWA_Pseudo <string opName, VOPProfile P, list<dag> pattern=[]> :
   let AsmVariantName = !if(P.HasExtSDWA, AMDGPUAsmVariants.SDWA,
                                          AMDGPUAsmVariants.Disable);
   let DecoderNamespace = "GFX8";
-
-  VOPProfile Pfl = P;
 }
 
 class VOP_SDWA8_Real <VOP_SDWA_Pseudo ps> :