[llvm] [AArch64] Add scal_to_vec patterns for SIMD convert intrinsics (PR #172837)

[via llvm-commits]

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@@ -6568,12 +6563,19 @@ multiclass FPToIntegerSIMDScalarPatterns<SDPatternOperator OpN, string INST> {
             (!cast<Instruction>(INST # DHr) FPR16:$Rn)>;
   def : Pat<(f64 (bitconvert (i64 (OpN (f32 FPR32:$Rn))))),
             (!cast<Instruction>(INST # DSr) FPR32:$Rn)>;
+
+  def : Pat<(v1i64 (scalar_to_vector (i64 (OpN (f16 FPR16:$Rn))))),
+            (!cast<Instruction>(INST # DHr) FPR16:$Rn)>;
+  def : Pat<(v1i64 (scalar_to_vector (i64 (OpN (f32 FPR32:$Rn))))),
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Lukacma wrote:

Thank you for pointing this out. I didn't add it for others, because I couldn't come with C program which would generate these patterns. But looking at it again I can see, that you need it for programs like [this](https://godbolt.org/z/a377E3fGW). So I added patterns for other types as well. @davemgreen this is also relevant to our discussion about canonicalizing scalar_to_vec. We can canonicalize v1i64 scal_to_vec, but we cannot do that for other variants, so I am not sure if there is a value in doing it for that one specific case.

https://github.com/llvm/llvm-project/pull/172837