[llvm] [LLVM][NVPTX] Add support for tcgen05.ld.red Instruction (PR #175919)

[Pradeep Kumar via llvm-commits]

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+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -o - -mcpu=sm_101a -march=nvptx64 -mattr=+ptx88 | FileCheck %s
+; RUN: llc < %s -o - -mcpu=sm_110a -march=nvptx64 -mattr=+ptx90 | FileCheck %s
+; RUN: llc < %s -o - -mcpu=sm_103f -march=nvptx64 -mattr=+ptx88 | FileCheck %s
+; RUN: llc < %s -o - -mcpu=sm_110f -march=nvptx64 -mattr=+ptx90 | FileCheck %s
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schwarzschild-radius wrote:

> I'm puzzled why we test 110a/110f for ptx90, but 101a/103f for ptx88

sm_110a/sm_110f are supported only from PTX 9.0 onwards and they are aliases to sm_101a/sm_101f. 

> Why 103f and not 101f?

The reason to not support sm_101f is because sm_110f is already being tested for that family and they point to the same sm_11x family (https://docs.nvidia.com/cuda/parallel-thread-execution/#ptx-module-directives-target), so it felt redundant

https://github.com/llvm/llvm-project/pull/175919