[llvm] [AArch64] Treat LD1 as cheap in getVectorInstrCostHelper on Apple cores. (PR #175970)

[David Green via llvm-commits]

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@@ -4024,11 +4024,14 @@ InstructionCost AArch64TTIImpl::getVectorInstrCostHelper(
     // This is recognising a LD1 single-element structure to one lane of one
     // register instruction. I.e., if this is an `insertelement` instruction,
     // and its second operand is a load, then we will generate a LD1, which
-    // are expensive instructions.
-    if (I && dyn_cast<LoadInst>(I->getOperand(1)))
+    // are expensive instructions on some uArchs.
+    if (I && dyn_cast<LoadInst>(I->getOperand(1))) {
+      if (ST->isAppleMLike())
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davemgreen wrote:

Yeah sounds good, thanks.

https://github.com/llvm/llvm-project/pull/175970