[llvm] [AMDGPU] Add legalization rules for atomic ops (PR #175253)

[Anshil Gandhi via llvm-commits]

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+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 < %s | FileCheck -check-prefixes=GFX12 %s
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gandhi56 wrote:

Cursor AI summary for atomic expansion is as follows:
Add and Xchg are privileged operations that work reliably across PCIe, while Sub/And/Or/Xor require conservative expansion to CmpXChg when targeting potentially remote fine-grained memory unless specific metadata or subtarget features indicate it's safe.

Albeit, I don't think the AtomicExpand pass should be altered to avoid generating G_AMDGPU_ATOMIC_CMPXCHG. CAS loops perform better than HW instructions on certain architectures such as gfx12. It's worthwhile to wait for the implementation of the missing opcodes.

https://github.com/llvm/llvm-project/pull/175253