[llvm] AMDGPU: Enable selection of strict_fp16_to_fp (PR #175834)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 13 13:01:32 PST 2026
https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/175834
This avoids regressions when softPromoteHalfType is switched on.
>From fe0a9a6a2fe31536b9405b2ac7da13cfa9526314 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Tue, 13 Jan 2026 21:52:44 +0100
Subject: [PATCH] AMDGPU: Enable selection of strict_fp16_to_fp
This avoids regressions when softPromoteHalfType is switched on.
---
llvm/lib/Target/AMDGPU/SIInstructions.td | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td
index 22564b8347110..e06bc912113a8 100644
--- a/llvm/lib/Target/AMDGPU/SIInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SIInstructions.td
@@ -1357,22 +1357,22 @@ multiclass f16_to_fp_Pats<Instruction cvt_f16_f32_inst_e64, Instruction cvt_f32_
>;
def : GCNPat <
- (f32 (f16_to_fp (and_oneuse i32:$src0, 0x7fff))),
+ (f32 (any_f16_to_fp (and_oneuse i32:$src0, 0x7fff))),
(cvt_f32_f16_inst_e64 SRCMODS.ABS, $src0)
>;
def : GCNPat <
- (f32 (f16_to_fp (i32 (srl_oneuse (and_oneuse i32:$src0, 0x7fff0000), (i32 16))))),
+ (f32 (any_f16_to_fp (i32 (srl_oneuse (and_oneuse i32:$src0, 0x7fff0000), (i32 16))))),
(cvt_f32_f16_inst_e64 SRCMODS.ABS, (i32 (V_LSHRREV_B32_e64 (i32 16), i32:$src0)))
>;
def : GCNPat <
- (f32 (f16_to_fp (or_oneuse i32:$src0, 0x8000))),
+ (f32 (any_f16_to_fp (or_oneuse i32:$src0, 0x8000))),
(cvt_f32_f16_inst_e64 SRCMODS.NEG_ABS, $src0)
>;
def : GCNPat <
- (f32 (f16_to_fp (xor_oneuse i32:$src0, 0x8000))),
+ (f32 (any_f16_to_fp (xor_oneuse i32:$src0, 0x8000))),
(cvt_f32_f16_inst_e64 SRCMODS.NEG, $src0)
>;
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