[llvm] 01e9c20 - [X86] isint.ll - ensure have test coverage for all x86-64 cpu levels (#175574)
via llvm-commits
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Mon Jan 12 08:31:30 PST 2026
Author: Simon Pilgrim
Date: 2026-01-12T16:31:25Z
New Revision: 01e9c20aa292126aa19b1a082ed960a8cee5201a
URL: https://github.com/llvm/llvm-project/commit/01e9c20aa292126aa19b1a082ed960a8cee5201a
DIFF: https://github.com/llvm/llvm-project/commit/01e9c20aa292126aa19b1a082ed960a8cee5201a.diff
LOG: [X86] isint.ll - ensure have test coverage for all x86-64 cpu levels (#175574)
Added:
Modified:
llvm/test/CodeGen/X86/isint.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/isint.ll b/llvm/test/CodeGen/X86/isint.ll
index 8c11fe147f0d8..778cfdf9e8351 100644
--- a/llvm/test/CodeGen/X86/isint.ll
+++ b/llvm/test/CodeGen/X86/isint.ll
@@ -1,20 +1,13 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-unknown -mattr=+sse2 | FileCheck -check-prefix=X64 %s
-; RUN: llc < %s -mtriple=i686-pc-unknown -mattr=+sse2 | FileCheck -check-prefix=X86 %s
+; RUN: llc < %s -mtriple=i686-pc-unknown -mattr=+sse2 | FileCheck %s -check-prefixes=X86
+; RUN: llc < %s -mtriple=x86_64-pc-unknown -mcpu=x86-64 | FileCheck %s -check-prefixes=X64-SSE2
+; RUN: llc < %s -mtriple=x86_64-pc-unknown -mcpu=x86-64-v2 | FileCheck %s -check-prefixes=X64-SSE42
+; RUN: llc < %s -mtriple=x86_64-pc-unknown -mcpu=x86-64-v3 | FileCheck %s -check-prefixes=X64-AVX,X64-AVX2
+; RUN: llc < %s -mtriple=x86_64-pc-unknown -mcpu=x86-64-v4 | FileCheck %s -check-prefixes=X64-AVX,X64-AVX512
; PR19059
define i32 @isint_return(double %d) nounwind {
-; X64-LABEL: isint_return:
-; X64: # %bb.0:
-; X64-NEXT: cvttpd2dq %xmm0, %xmm1
-; X64-NEXT: cvtdq2pd %xmm1, %xmm1
-; X64-NEXT: cmpeqsd %xmm0, %xmm1
-; X64-NEXT: movq %xmm1, %rax
-; X64-NEXT: andl $1, %eax
-; X64-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-NEXT: retq
-;
; X86-LABEL: isint_return:
; X86: # %bb.0:
; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
@@ -24,6 +17,41 @@ define i32 @isint_return(double %d) nounwind {
; X86-NEXT: movd %xmm1, %eax
; X86-NEXT: andl $1, %eax
; X86-NEXT: retl
+;
+; X64-SSE2-LABEL: isint_return:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: cvttpd2dq %xmm0, %xmm1
+; X64-SSE2-NEXT: cvtdq2pd %xmm1, %xmm1
+; X64-SSE2-NEXT: cmpeqsd %xmm0, %xmm1
+; X64-SSE2-NEXT: movq %xmm1, %rax
+; X64-SSE2-NEXT: andl $1, %eax
+; X64-SSE2-NEXT: # kill: def $eax killed $eax killed $rax
+; X64-SSE2-NEXT: retq
+;
+; X64-SSE42-LABEL: isint_return:
+; X64-SSE42: # %bb.0:
+; X64-SSE42-NEXT: roundsd $11, %xmm0, %xmm1
+; X64-SSE42-NEXT: cmpeqsd %xmm0, %xmm1
+; X64-SSE42-NEXT: movq %xmm1, %rax
+; X64-SSE42-NEXT: andl $1, %eax
+; X64-SSE42-NEXT: # kill: def $eax killed $eax killed $rax
+; X64-SSE42-NEXT: retq
+;
+; X64-AVX2-LABEL: isint_return:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vroundsd $11, %xmm0, %xmm0, %xmm1
+; X64-AVX2-NEXT: vcmpeqsd %xmm1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vmovq %xmm0, %rax
+; X64-AVX2-NEXT: andl $1, %eax
+; X64-AVX2-NEXT: # kill: def $eax killed $eax killed $rax
+; X64-AVX2-NEXT: retq
+;
+; X64-AVX512-LABEL: isint_return:
+; X64-AVX512: # %bb.0:
+; X64-AVX512-NEXT: vroundsd $11, %xmm0, %xmm0, %xmm1
+; X64-AVX512-NEXT: vcmpeqsd %xmm1, %xmm0, %k0
+; X64-AVX512-NEXT: kmovw %k0, %eax
+; X64-AVX512-NEXT: retq
%i = fptosi double %d to i32
%e = sitofp i32 %i to double
%c = fcmp oeq double %d, %e
@@ -32,15 +60,6 @@ define i32 @isint_return(double %d) nounwind {
}
define i32 @isint_float_return(float %f) nounwind {
-; X64-LABEL: isint_float_return:
-; X64: # %bb.0:
-; X64-NEXT: cvttps2dq %xmm0, %xmm1
-; X64-NEXT: cvtdq2ps %xmm1, %xmm1
-; X64-NEXT: cmpeqss %xmm0, %xmm1
-; X64-NEXT: movd %xmm1, %eax
-; X64-NEXT: andl $1, %eax
-; X64-NEXT: retq
-;
; X86-LABEL: isint_float_return:
; X86: # %bb.0:
; X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
@@ -50,6 +69,38 @@ define i32 @isint_float_return(float %f) nounwind {
; X86-NEXT: movd %xmm1, %eax
; X86-NEXT: andl $1, %eax
; X86-NEXT: retl
+;
+; X64-SSE2-LABEL: isint_float_return:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: cvttps2dq %xmm0, %xmm1
+; X64-SSE2-NEXT: cvtdq2ps %xmm1, %xmm1
+; X64-SSE2-NEXT: cmpeqss %xmm0, %xmm1
+; X64-SSE2-NEXT: movd %xmm1, %eax
+; X64-SSE2-NEXT: andl $1, %eax
+; X64-SSE2-NEXT: retq
+;
+; X64-SSE42-LABEL: isint_float_return:
+; X64-SSE42: # %bb.0:
+; X64-SSE42-NEXT: roundss $11, %xmm0, %xmm1
+; X64-SSE42-NEXT: cmpeqss %xmm0, %xmm1
+; X64-SSE42-NEXT: movd %xmm1, %eax
+; X64-SSE42-NEXT: andl $1, %eax
+; X64-SSE42-NEXT: retq
+;
+; X64-AVX2-LABEL: isint_float_return:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: vroundss $11, %xmm0, %xmm0, %xmm1
+; X64-AVX2-NEXT: vcmpeqss %xmm1, %xmm0, %xmm0
+; X64-AVX2-NEXT: vmovd %xmm0, %eax
+; X64-AVX2-NEXT: andl $1, %eax
+; X64-AVX2-NEXT: retq
+;
+; X64-AVX512-LABEL: isint_float_return:
+; X64-AVX512: # %bb.0:
+; X64-AVX512-NEXT: vroundss $11, %xmm0, %xmm0, %xmm1
+; X64-AVX512-NEXT: vcmpeqss %xmm1, %xmm0, %k0
+; X64-AVX512-NEXT: kmovw %k0, %eax
+; X64-AVX512-NEXT: retq
%i = fptosi float %f to i32
%g = sitofp i32 %i to float
%c = fcmp oeq float %f, %g
@@ -60,20 +111,6 @@ define i32 @isint_float_return(float %f) nounwind {
declare void @foo()
define void @isint_branch(double %d) nounwind {
-; X64-LABEL: isint_branch:
-; X64: # %bb.0:
-; X64-NEXT: cvttpd2dq %xmm0, %xmm1
-; X64-NEXT: cvtdq2pd %xmm1, %xmm1
-; X64-NEXT: ucomisd %xmm1, %xmm0
-; X64-NEXT: jne .LBB2_2
-; X64-NEXT: jp .LBB2_2
-; X64-NEXT: # %bb.1: # %true
-; X64-NEXT: pushq %rax
-; X64-NEXT: callq foo at PLT
-; X64-NEXT: popq %rax
-; X64-NEXT: .LBB2_2: # %false
-; X64-NEXT: retq
-;
; X86-LABEL: isint_branch:
; X86: # %bb.0:
; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
@@ -86,6 +123,46 @@ define void @isint_branch(double %d) nounwind {
; X86-NEXT: calll foo at PLT
; X86-NEXT: .LBB2_2: # %false
; X86-NEXT: retl
+;
+; X64-SSE2-LABEL: isint_branch:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: cvttpd2dq %xmm0, %xmm1
+; X64-SSE2-NEXT: cvtdq2pd %xmm1, %xmm1
+; X64-SSE2-NEXT: ucomisd %xmm1, %xmm0
+; X64-SSE2-NEXT: jne .LBB2_2
+; X64-SSE2-NEXT: jp .LBB2_2
+; X64-SSE2-NEXT: # %bb.1: # %true
+; X64-SSE2-NEXT: pushq %rax
+; X64-SSE2-NEXT: callq foo at PLT
+; X64-SSE2-NEXT: popq %rax
+; X64-SSE2-NEXT: .LBB2_2: # %false
+; X64-SSE2-NEXT: retq
+;
+; X64-SSE42-LABEL: isint_branch:
+; X64-SSE42: # %bb.0:
+; X64-SSE42-NEXT: roundsd $11, %xmm0, %xmm1
+; X64-SSE42-NEXT: ucomisd %xmm1, %xmm0
+; X64-SSE42-NEXT: jne .LBB2_2
+; X64-SSE42-NEXT: jp .LBB2_2
+; X64-SSE42-NEXT: # %bb.1: # %true
+; X64-SSE42-NEXT: pushq %rax
+; X64-SSE42-NEXT: callq foo at PLT
+; X64-SSE42-NEXT: popq %rax
+; X64-SSE42-NEXT: .LBB2_2: # %false
+; X64-SSE42-NEXT: retq
+;
+; X64-AVX-LABEL: isint_branch:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vroundsd $11, %xmm0, %xmm0, %xmm1
+; X64-AVX-NEXT: vucomisd %xmm1, %xmm0
+; X64-AVX-NEXT: jne .LBB2_2
+; X64-AVX-NEXT: jp .LBB2_2
+; X64-AVX-NEXT: # %bb.1: # %true
+; X64-AVX-NEXT: pushq %rax
+; X64-AVX-NEXT: callq foo at PLT
+; X64-AVX-NEXT: popq %rax
+; X64-AVX-NEXT: .LBB2_2: # %false
+; X64-AVX-NEXT: retq
%i = fptosi double %d to i32
%e = sitofp i32 %i to double
%c = fcmp oeq double %d, %e
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