[llvm] [X86] Lower scalar llvm.clmul intrinsics to PCLMULQDQ (#175189) (PR #175216)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 12 03:35:44 PST 2026
================
@@ -1155,6 +1155,13 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
setOperationAction(ISD::OR, MVT::i128, Custom);
setOperationAction(ISD::XOR, MVT::i128, Custom);
+ if (Subtarget.hasPCLMUL() && Subtarget.is64Bit()) {
----------------
RKSimon wrote:
Only i64 needs to require is64Bit?
https://github.com/llvm/llvm-project/pull/175216
More information about the llvm-commits
mailing list