[llvm] [X86][NewPM] Port x86-compress-evex (PR #174312)
via llvm-commits
llvm-commits at lists.llvm.org
Sat Jan 3 22:32:19 PST 2026
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-x86
Author: Aiden Grossman (boomanaiden154)
<details>
<summary>Changes</summary>
Similar to other ports. This one ends up being simpler as we do not need an implemntation class as all of the logic is implemented as static functions.
---
Full diff: https://github.com/llvm/llvm-project/pull/174312.diff
5 Files Affected:
- (modified) llvm/lib/Target/X86/X86.h (+8-2)
- (modified) llvm/lib/Target/X86/X86CompressEVEX.cpp (+26-7)
- (modified) llvm/lib/Target/X86/X86PassRegistry.def (+1-1)
- (modified) llvm/lib/Target/X86/X86TargetMachine.cpp (+2-2)
- (modified) llvm/test/CodeGen/X86/evex-to-vex-compress.mir (+1)
``````````diff
diff --git a/llvm/lib/Target/X86/X86.h b/llvm/lib/Target/X86/X86.h
index 485340134c7cf..d244b4c5042f1 100644
--- a/llvm/lib/Target/X86/X86.h
+++ b/llvm/lib/Target/X86/X86.h
@@ -198,7 +198,13 @@ FunctionPass *createX86DomainReassignmentPass();
/// This pass compress instructions from EVEX space to legacy/VEX/EVEX space when
/// possible in order to reduce code size or facilitate HW decoding.
-FunctionPass *createX86CompressEVEXPass();
+class X86CompressEVEXPass : public PassInfoMixin<X86CompressEVEXPass> {
+public:
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+};
+
+FunctionPass *createX86CompressEVEXLegacyPass();
/// This pass creates the thunks for the retpoline feature.
FunctionPass *createX86IndirectThunksPass();
@@ -268,7 +274,7 @@ FunctionPass *createX86SpeculativeExecutionSideEffectSuppression();
FunctionPass *createX86ArgumentStackSlotPass();
FunctionPass *createX86SuppressAPXForRelocationPass();
-void initializeCompressEVEXPassPass(PassRegistry &);
+void initializeCompressEVEXLegacyPass(PassRegistry &);
void initializeFixupBWInstPassPass(PassRegistry &);
void initializeFixupLEAsLegacyPass(PassRegistry &);
void initializeX86ArgumentStackSlotPassPass(PassRegistry &);
diff --git a/llvm/lib/Target/X86/X86CompressEVEX.cpp b/llvm/lib/Target/X86/X86CompressEVEX.cpp
index 0f55c19c69120..59d653b84eb8a 100644
--- a/llvm/lib/Target/X86/X86CompressEVEX.cpp
+++ b/llvm/lib/Target/X86/X86CompressEVEX.cpp
@@ -43,9 +43,12 @@
#include "X86Subtarget.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineFunctionAnalysisManager.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineOperand.h"
+#include "llvm/CodeGen/MachinePassManager.h"
+#include "llvm/IR/Analysis.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/Pass.h"
#include <atomic>
@@ -66,10 +69,10 @@ namespace {
#define GET_X86_COMPRESS_EVEX_TABLE
#include "X86GenInstrMapping.inc"
-class CompressEVEXPass : public MachineFunctionPass {
+class CompressEVEXLegacy : public MachineFunctionPass {
public:
static char ID;
- CompressEVEXPass() : MachineFunctionPass(ID) {}
+ CompressEVEXLegacy() : MachineFunctionPass(ID) {}
StringRef getPassName() const override { return COMP_EVEX_DESC; }
bool runOnMachineFunction(MachineFunction &MF) override;
@@ -82,7 +85,7 @@ class CompressEVEXPass : public MachineFunctionPass {
} // end anonymous namespace
-char CompressEVEXPass::ID = 0;
+char CompressEVEXLegacy::ID = 0;
static bool usesExtendedRegister(const MachineInstr &MI) {
auto isHiRegIdx = [](MCRegister Reg) {
@@ -329,7 +332,7 @@ static bool CompressEVEXImpl(MachineInstr &MI, MachineBasicBlock &MBB,
return true;
}
-bool CompressEVEXPass::runOnMachineFunction(MachineFunction &MF) {
+static bool runOnMF(MachineFunction &MF) {
LLVM_DEBUG(dbgs() << "Start X86CompressEVEXPass\n";);
#ifndef NDEBUG
// Make sure the tables are sorted.
@@ -355,8 +358,24 @@ bool CompressEVEXPass::runOnMachineFunction(MachineFunction &MF) {
return Changed;
}
-INITIALIZE_PASS(CompressEVEXPass, COMP_EVEX_NAME, COMP_EVEX_DESC, false, false)
+INITIALIZE_PASS(CompressEVEXLegacy, COMP_EVEX_NAME, COMP_EVEX_DESC, false,
+ false)
-FunctionPass *llvm::createX86CompressEVEXPass() {
- return new CompressEVEXPass();
+FunctionPass *llvm::createX86CompressEVEXLegacyPass() {
+ return new CompressEVEXLegacy();
+}
+
+bool CompressEVEXLegacy::runOnMachineFunction(MachineFunction &MF) {
+ return runOnMF(MF);
+}
+
+PreservedAnalyses
+X86CompressEVEXPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ bool Changed = runOnMF(MF);
+ if (!Changed)
+ return PreservedAnalyses::all();
+ PreservedAnalyses PA = getMachineFunctionPassPreservedAnalyses();
+ PA.preserveSet<CFGAnalyses>();
+ return PA;
}
diff --git a/llvm/lib/Target/X86/X86PassRegistry.def b/llvm/lib/Target/X86/X86PassRegistry.def
index a5642e2edcf72..b7248c1ecbe46 100644
--- a/llvm/lib/Target/X86/X86PassRegistry.def
+++ b/llvm/lib/Target/X86/X86PassRegistry.def
@@ -32,6 +32,7 @@ DUMMY_FUNCTION_PASS("x86-winehstate", WinEHStatePass())
MACHINE_FUNCTION_PASS("x86-avoid-sfb", X86AvoidStoreForwardingBlocksPass())
MACHINE_FUNCTION_PASS("x86-avoid-trailing-call", X86AvoidTrailingCallPass())
MACHINE_FUNCTION_PASS("x86-cf-opt", X86CallFrameOptimizationPass())
+MACHINE_FUNCTION_PASS("x86-compress-evex", X86CompressEVEXPass())
MACHINE_FUNCTION_PASS("x86-dyn-alloca-expander", X86DynAllocaExpanderPass())
MACHINE_FUNCTION_PASS("x86-expand-pseudo", X86ExpandPseudoPass())
MACHINE_FUNCTION_PASS("x86-fixup-leas", X86FixupLEAsPass())
@@ -45,7 +46,6 @@ MACHINE_FUNCTION_PASS("x86-optimize-leas", X86OptimizeLEAsPass())
#define DUMMY_MACHINE_FUNCTION_PASS(NAME, PASS_NAME)
#endif
DUMMY_MACHINE_FUNCTION_PASS("x86-cmov-conversion", X86CmovConverterPass())
-DUMMY_MACHINE_FUNCTION_PASS("x86-compress-evex", CompressEVEXPass())
DUMMY_MACHINE_FUNCTION_PASS("x86-domain-reassignment", X86DomainReassignment())
DUMMY_MACHINE_FUNCTION_PASS("x86-execution-domain-fix", X86ExecutionDomainFix())
DUMMY_MACHINE_FUNCTION_PASS("fastpretileconfig", X86FastPreTileConfig())
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
index 3df42c4dc4a29..fe33842cf7f5a 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.cpp
+++ b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -74,7 +74,7 @@ extern "C" LLVM_C_ABI void LLVMInitializeX86Target() {
initializeGlobalISel(PR);
initializeWinEHStatePassPass(PR);
initializeFixupBWInstPassPass(PR);
- initializeCompressEVEXPassPass(PR);
+ initializeCompressEVEXLegacyPass(PR);
initializeFixupLEAsLegacyPass(PR);
initializeX86FPStackifierLegacyPass(PR);
initializeX86FixupSetCCPassPass(PR);
@@ -570,7 +570,7 @@ void X86PassConfig::addPreEmitPass() {
addPass(createX86FixupInstTuning());
addPass(createX86FixupVectorConstants());
}
- addPass(createX86CompressEVEXPass());
+ addPass(createX86CompressEVEXLegacyPass());
addPass(createX86InsertX87waitPass());
}
diff --git a/llvm/test/CodeGen/X86/evex-to-vex-compress.mir b/llvm/test/CodeGen/X86/evex-to-vex-compress.mir
index 452adf1d920b5..982af38204728 100644
--- a/llvm/test/CodeGen/X86/evex-to-vex-compress.mir
+++ b/llvm/test/CodeGen/X86/evex-to-vex-compress.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=x86_64-- -run-pass x86-compress-evex -verify-machineinstrs -mcpu=skx -o - %s | FileCheck %s
+# RUN: llc -mtriple=x86_64-- -passes=x86-compress-evex -mcpu=skx -o - %s | FileCheck %s
# This test verifies VEX encoding for AVX-512 instructions that use registers of low indexes and
# do not use zmm or mask registers and have a corresponding AVX/AVX2 opcode
``````````
</details>
https://github.com/llvm/llvm-project/pull/174312
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