[llvm] [X86] Cleanup uses of "(BW-1) - LOG2(C)" --> "CLZ(C)" instead. NFC. (PR #174167)

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Sat Jan 3 05:24:19 PST 2026


https://github.com/RKSimon updated https://github.com/llvm/llvm-project/pull/174167

>From 67d01ecc6b5f69d09e2ec26353695ad29e590789 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: Thu, 1 Jan 2026 23:13:16 +0000
Subject: [PATCH] [X86] Cleanup uses of "(BW-1) - LOG2(C)" --> "CLZ(C)"
 instead. NFC.

We know in both cases that the value `C` is a power-of-2 constant, so we know the "(BW-1) - LOG2(C)" can be more obviously represented as "CLZ(C)".

In both places it occurs it also makes it much easier to understand what's being done: shift the single masked bit up to the MSB and then use SRA to splat it to all bits.
---
 llvm/lib/Target/X86/X86ISelLowering.cpp | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 20136ade7c317..61c6eb09b7e02 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -24553,13 +24553,13 @@ static SDValue LowerVSETCC(SDValue Op, const X86Subtarget &Subtarget,
     }
   }
 
-  // ICMP_EQ(AND(X,C),C) -> SRA(SHL(X,LOG2(C)),BW-1) iff C is power-of-2.
+  // ICMP_EQ(AND(X,C),C) -> SRA(SHL(X,CTLZ(C)),BW-1) iff C is power-of-2.
   if (Cond == ISD::SETEQ && Op0.getOpcode() == ISD::AND &&
       Op0.getOperand(1) == Op1 && Op0.hasOneUse()) {
     ConstantSDNode *C1 = isConstOrConstSplat(Op1);
     if (C1 && C1->getAPIntValue().isPowerOf2()) {
       unsigned BitWidth = VT.getScalarSizeInBits();
-      unsigned ShiftAmt = BitWidth - C1->getAPIntValue().logBase2() - 1;
+      unsigned ShiftAmt = C1->getAPIntValue().countl_zero();
 
       SDValue Result = Op0.getOperand(0);
       Result = DAG.getNode(ISD::SHL, dl, VT, Result,
@@ -48466,8 +48466,7 @@ static SDValue combineSelect(SDNode *N, SelectionDAG &DAG,
       SmallVector<int, 32> ShlVals;
       for (unsigned i = 0, e = VT.getVectorNumElements(); i != e; ++i) {
         auto *MaskVal = cast<ConstantSDNode>(Mask.getOperand(i));
-        ShlVals.push_back(EltBitWidth - 1 -
-                          MaskVal->getAPIntValue().exactLogBase2());
+        ShlVals.push_back(MaskVal->getAPIntValue().countl_zero());
       }
       // vsel ((X & C) == 0), LHS, RHS --> vsel ((shl X, C') < 0), RHS, LHS
       MVT MskVT = Mask.getSimpleValueType();



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