[llvm] [NFC][PowerPC] Pre-commit adding test case: use millicode for strcpy (PR #174243)
zhijian lin via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 2 13:11:49 PST 2026
https://github.com/diggerlin created https://github.com/llvm/llvm-project/pull/174243
add test case to test lib call are used for the ___strcpy milicode.
>From 1cf5e67f181c2ab08a90d9a500bd9f3bc99ed62d Mon Sep 17 00:00:00 2001
From: zhijian <zhijian at ca.ibm.com>
Date: Fri, 2 Jan 2026 16:07:54 -0500
Subject: [PATCH] pre commit test case for the milicode call __strcpy
---
llvm/test/CodeGen/PowerPC/milicode32.ll | 43 ++++++++++++++++++
llvm/test/CodeGen/PowerPC/milicode64.ll | 60 +++++++++++++++++++++++++
2 files changed, 103 insertions(+)
diff --git a/llvm/test/CodeGen/PowerPC/milicode32.ll b/llvm/test/CodeGen/PowerPC/milicode32.ll
index b69b997254d2c..17261642f0040 100644
--- a/llvm/test/CodeGen/PowerPC/milicode32.ll
+++ b/llvm/test/CodeGen/PowerPC/milicode32.ll
@@ -159,3 +159,46 @@ entry:
}
declare void @llvm.memmove.p0.p0.i32(ptr writeonly captures(none), ptr readonly captures(none), i32, i1 immarg)
+
+define void @copy_string(ptr noundef %dest, ptr noundef %src) {
+; CHECK-AIX-32-P9-LABEL: copy_string:
+; CHECK-AIX-32-P9: # %bb.0: # %entry
+; CHECK-AIX-32-P9-NEXT: mflr r0
+; CHECK-AIX-32-P9-NEXT: stwu r1, -80(r1)
+; CHECK-AIX-32-P9-NEXT: stw r0, 88(r1)
+; CHECK-AIX-32-P9-NEXT: stw r3, 72(r1)
+; CHECK-AIX-32-P9-NEXT: stw r4, 64(r1)
+; CHECK-AIX-32-P9-NEXT: bl .strcpy[PR]
+; CHECK-AIX-32-P9-NEXT: nop
+; CHECK-AIX-32-P9-NEXT: addi r1, r1, 80
+; CHECK-AIX-32-P9-NEXT: lwz r0, 8(r1)
+; CHECK-AIX-32-P9-NEXT: mtlr r0
+; CHECK-AIX-32-P9-NEXT: blr
+;
+; CHECK-LINUX32-P9-LABEL: copy_string:
+; CHECK-LINUX32-P9: # %bb.0: # %entry
+; CHECK-LINUX32-P9-NEXT: mflr r0
+; CHECK-LINUX32-P9-NEXT: stwu r1, -32(r1)
+; CHECK-LINUX32-P9-NEXT: stw r0, 36(r1)
+; CHECK-LINUX32-P9-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LINUX32-P9-NEXT: .cfi_offset lr, 4
+; CHECK-LINUX32-P9-NEXT: stw r3, 24(r1)
+; CHECK-LINUX32-P9-NEXT: stw r4, 16(r1)
+; CHECK-LINUX32-P9-NEXT: bl strcpy
+; CHECK-LINUX32-P9-NEXT: lwz r0, 36(r1)
+; CHECK-LINUX32-P9-NEXT: addi r1, r1, 32
+; CHECK-LINUX32-P9-NEXT: mtlr r0
+; CHECK-LINUX32-P9-NEXT: blr
+entry:
+ %dest.addr = alloca ptr, align 8
+ %src.addr = alloca ptr, align 8
+ store ptr %dest, ptr %dest.addr, align 8
+ store ptr %src, ptr %src.addr, align 8
+ %0 = load ptr, ptr %dest.addr, align 8
+ %1 = load ptr, ptr %src.addr, align 8
+ %call = call ptr @strcpy(ptr noundef %0, ptr noundef %1)
+ ret void
+}
+
+
+declare ptr @strcpy(ptr noundef, ptr noundef)
diff --git a/llvm/test/CodeGen/PowerPC/milicode64.ll b/llvm/test/CodeGen/PowerPC/milicode64.ll
index 2dbf4140a0fa4..7d51f177f98bb 100644
--- a/llvm/test/CodeGen/PowerPC/milicode64.ll
+++ b/llvm/test/CodeGen/PowerPC/milicode64.ll
@@ -179,3 +179,63 @@ entry:
}
declare void @llvm.memmove.p0.p0.i32(ptr writeonly captures(none), ptr readonly captures(none), i32, i1 immarg)
+
+define dso_local void @copy_string(ptr noundef %dest, ptr noundef %src) {
+; CHECK-LE-P9-LABEL: copy_string:
+; CHECK-LE-P9: # %bb.0: # %entry
+; CHECK-LE-P9-NEXT: mflr r0
+; CHECK-LE-P9-NEXT: stdu r1, -48(r1)
+; CHECK-LE-P9-NEXT: std r0, 64(r1)
+; CHECK-LE-P9-NEXT: .cfi_def_cfa_offset 48
+; CHECK-LE-P9-NEXT: .cfi_offset lr, 16
+; CHECK-LE-P9-NEXT: std r3, 40(r1)
+; CHECK-LE-P9-NEXT: std r4, 32(r1)
+; CHECK-LE-P9-NEXT: bl strcpy
+; CHECK-LE-P9-NEXT: nop
+; CHECK-LE-P9-NEXT: addi r1, r1, 48
+; CHECK-LE-P9-NEXT: ld r0, 16(r1)
+; CHECK-LE-P9-NEXT: mtlr r0
+; CHECK-LE-P9-NEXT: blr
+;
+; CHECK-BE-P9-LABEL: copy_string:
+; CHECK-BE-P9: # %bb.0: # %entry
+; CHECK-BE-P9-NEXT: mflr r0
+; CHECK-BE-P9-NEXT: stdu r1, -128(r1)
+; CHECK-BE-P9-NEXT: std r0, 144(r1)
+; CHECK-BE-P9-NEXT: .cfi_def_cfa_offset 128
+; CHECK-BE-P9-NEXT: .cfi_offset lr, 16
+; CHECK-BE-P9-NEXT: std r3, 120(r1)
+; CHECK-BE-P9-NEXT: std r4, 112(r1)
+; CHECK-BE-P9-NEXT: bl strcpy
+; CHECK-BE-P9-NEXT: nop
+; CHECK-BE-P9-NEXT: addi r1, r1, 128
+; CHECK-BE-P9-NEXT: ld r0, 16(r1)
+; CHECK-BE-P9-NEXT: mtlr r0
+; CHECK-BE-P9-NEXT: blr
+;
+; CHECK-AIX-64-P9-LABEL: copy_string:
+; CHECK-AIX-64-P9: # %bb.0: # %entry
+; CHECK-AIX-64-P9-NEXT: mflr r0
+; CHECK-AIX-64-P9-NEXT: stdu r1, -128(r1)
+; CHECK-AIX-64-P9-NEXT: std r0, 144(r1)
+; CHECK-AIX-64-P9-NEXT: std r3, 120(r1)
+; CHECK-AIX-64-P9-NEXT: std r4, 112(r1)
+; CHECK-AIX-64-P9-NEXT: bl .strcpy[PR]
+; CHECK-AIX-64-P9-NEXT: nop
+; CHECK-AIX-64-P9-NEXT: addi r1, r1, 128
+; CHECK-AIX-64-P9-NEXT: ld r0, 16(r1)
+; CHECK-AIX-64-P9-NEXT: mtlr r0
+; CHECK-AIX-64-P9-NEXT: blr
+entry:
+ %dest.addr = alloca ptr, align 8
+ %src.addr = alloca ptr, align 8
+ store ptr %dest, ptr %dest.addr, align 8
+ store ptr %src, ptr %src.addr, align 8
+ %0 = load ptr, ptr %dest.addr, align 8
+ %1 = load ptr, ptr %src.addr, align 8
+ %call = call ptr @strcpy(ptr noundef %0, ptr noundef %1)
+ ret void
+}
+
+
+declare ptr @strcpy(ptr noundef, ptr noundef)
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