[llvm] 818814d - [X86][NewPM] Port X86FlagsCopyLowering to NPM
via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 31 10:33:28 PST 2025
Author: Aiden Grossman
Date: 2025-12-31T10:33:24-08:00
New Revision: 818814d89b36094924e624cee485b0f853f9f707
URL: https://github.com/llvm/llvm-project/commit/818814d89b36094924e624cee485b0f853f9f707
DIFF: https://github.com/llvm/llvm-project/commit/818814d89b36094924e624cee485b0f853f9f707.diff
LOG: [X86][NewPM] Port X86FlagsCopyLowering to NPM
As the title says. Take a couple of existing tests that run solely this
pass and use them for test coverage.
Reviewers: topperc, RKSimon, arsenm, phoebewang, paperchalice, aengelke
Pull Request: https://github.com/llvm/llvm-project/pull/173752
Added:
Modified:
llvm/lib/Target/X86/X86.h
llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
llvm/lib/Target/X86/X86PassRegistry.def
llvm/lib/Target/X86/X86TargetMachine.cpp
llvm/test/CodeGen/X86/apx/flags-copy-lowering.mir
llvm/test/CodeGen/X86/flags-copy-lowering.mir
llvm/test/CodeGen/X86/pr51903.mir
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86.h b/llvm/lib/Target/X86/X86.h
index aa2e348765d47..a69e31f0975eb 100644
--- a/llvm/lib/Target/X86/X86.h
+++ b/llvm/lib/Target/X86/X86.h
@@ -93,7 +93,14 @@ FunctionPass *createX86FixupSetCC();
FunctionPass *createX86AvoidStoreForwardingBlocks();
/// Return a pass that lowers EFLAGS copy pseudo instructions.
-FunctionPass *createX86FlagsCopyLoweringPass();
+class X86FlagsCopyLoweringPass
+ : public PassInfoMixin<X86FlagsCopyLoweringPass> {
+public:
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+};
+
+FunctionPass *createX86FlagsCopyLoweringLegacyPass();
/// Return a pass that expands DynAlloca pseudo-instructions.
class X86DynAllocaExpanderPass
@@ -261,7 +268,7 @@ void initializeX86FPStackifierLegacyPass(PassRegistry &);
void initializeX86FastPreTileConfigPass(PassRegistry &);
void initializeX86FastTileConfigPass(PassRegistry &);
void initializeX86FixupSetCCPassPass(PassRegistry &);
-void initializeX86FlagsCopyLoweringPassPass(PassRegistry &);
+void initializeX86FlagsCopyLoweringLegacyPass(PassRegistry &);
void initializeX86LoadValueInjectionLoadHardeningPassPass(PassRegistry &);
void initializeX86LoadValueInjectionRetHardeningPassPass(PassRegistry &);
void initializeX86LowerAMXIntrinsicsLegacyPassPass(PassRegistry &);
diff --git a/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp b/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
index b3bf37a9a462c..5f38663876cfa 100644
--- a/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
+++ b/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
@@ -34,17 +34,20 @@
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineFunctionAnalysisManager.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineOperand.h"
+#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/MachineSSAUpdater.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TargetSchedule.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
+#include "llvm/IR/Analysis.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/MC/MCSchedule.h"
#include "llvm/Pass.h"
@@ -72,16 +75,11 @@ namespace {
// Convenient array type for storing registers associated with each condition.
using CondRegArray = std::array<Register, X86::LAST_VALID_COND + 1>;
-class X86FlagsCopyLoweringPass : public MachineFunctionPass {
+class X86FlagsCopyLoweringImpl {
public:
- X86FlagsCopyLoweringPass() : MachineFunctionPass(ID) {}
+ X86FlagsCopyLoweringImpl(MachineDominatorTree *MDT) : MDT(MDT) {}
- StringRef getPassName() const override { return "X86 EFLAGS copy lowering"; }
- bool runOnMachineFunction(MachineFunction &MF) override;
- void getAnalysisUsage(AnalysisUsage &AU) const override;
-
- /// Pass identification, replacement for typeid.
- static char ID;
+ bool runOnMachineFunction(MachineFunction &MF);
private:
MachineRegisterInfo *MRI = nullptr;
@@ -113,20 +111,32 @@ class X86FlagsCopyLoweringPass : public MachineFunctionPass {
const DebugLoc &Loc, MachineInstr &MI, CondRegArray &CondRegs);
};
+class X86FlagsCopyLoweringLegacy : public MachineFunctionPass {
+public:
+ X86FlagsCopyLoweringLegacy() : MachineFunctionPass(ID) {}
+
+ StringRef getPassName() const override { return "X86 EFLAGS copy lowering"; }
+ bool runOnMachineFunction(MachineFunction &MF) override;
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
+
+ /// Pass identification, replacement for typeid.
+ static char ID;
+};
+
} // end anonymous namespace
-INITIALIZE_PASS_BEGIN(X86FlagsCopyLoweringPass, DEBUG_TYPE,
+INITIALIZE_PASS_BEGIN(X86FlagsCopyLoweringLegacy, DEBUG_TYPE,
"X86 EFLAGS copy lowering", false, false)
-INITIALIZE_PASS_END(X86FlagsCopyLoweringPass, DEBUG_TYPE,
+INITIALIZE_PASS_END(X86FlagsCopyLoweringLegacy, DEBUG_TYPE,
"X86 EFLAGS copy lowering", false, false)
-FunctionPass *llvm::createX86FlagsCopyLoweringPass() {
- return new X86FlagsCopyLoweringPass();
+FunctionPass *llvm::createX86FlagsCopyLoweringLegacyPass() {
+ return new X86FlagsCopyLoweringLegacy();
}
-char X86FlagsCopyLoweringPass::ID = 0;
+char X86FlagsCopyLoweringLegacy::ID = 0;
-void X86FlagsCopyLoweringPass::getAnalysisUsage(AnalysisUsage &AU) const {
+void X86FlagsCopyLoweringLegacy::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addUsedIfAvailable<MachineDominatorTreeWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -257,8 +267,8 @@ static EFLAGSClobber getClobberType(const MachineInstr &MI) {
return InevitableClobber;
}
-bool X86FlagsCopyLoweringPass::runOnMachineFunction(MachineFunction &MF) {
- LLVM_DEBUG(dbgs() << "********** " << getPassName() << " : " << MF.getName()
+bool X86FlagsCopyLoweringImpl::runOnMachineFunction(MachineFunction &MF) {
+ LLVM_DEBUG(dbgs() << "********** " << PASS_KEY << " : " << MF.getName()
<< " **********\n");
Subtarget = &MF.getSubtarget<X86Subtarget>();
@@ -280,12 +290,8 @@ bool X86FlagsCopyLoweringPass::runOnMachineFunction(MachineFunction &MF) {
// got a valid MDT from the pass manager, use that, otherwise construct one
// now. This is an optimization that avoids unnecessary MDT construction for
// functions that have no flag copies.
-
- auto MDTWrapper = getAnalysisIfAvailable<MachineDominatorTreeWrapperPass>();
std::unique_ptr<MachineDominatorTree> OwnedMDT;
- if (MDTWrapper) {
- MDT = &MDTWrapper->getDomTree();
- } else {
+ if (!MDT) {
OwnedMDT = std::make_unique<MachineDominatorTree>(MF);
MDT = OwnedMDT.get();
}
@@ -718,7 +724,7 @@ bool X86FlagsCopyLoweringPass::runOnMachineFunction(MachineFunction &MF) {
/// Collect any conditions that have already been set in registers so that we
/// can re-use them rather than adding duplicates.
-CondRegArray X86FlagsCopyLoweringPass::collectCondsInRegs(
+CondRegArray X86FlagsCopyLoweringImpl::collectCondsInRegs(
MachineBasicBlock &MBB, MachineBasicBlock::iterator TestPos) {
CondRegArray CondRegs = {};
@@ -741,7 +747,7 @@ CondRegArray X86FlagsCopyLoweringPass::collectCondsInRegs(
return CondRegs;
}
-Register X86FlagsCopyLoweringPass::promoteCondToReg(
+Register X86FlagsCopyLoweringImpl::promoteCondToReg(
MachineBasicBlock &TestMBB, MachineBasicBlock::iterator TestPos,
const DebugLoc &TestLoc, X86::CondCode Cond) {
Register Reg = MRI->createVirtualRegister(PromoteRC);
@@ -753,7 +759,7 @@ Register X86FlagsCopyLoweringPass::promoteCondToReg(
return Reg;
}
-std::pair<Register, bool> X86FlagsCopyLoweringPass::getCondOrInverseInReg(
+std::pair<Register, bool> X86FlagsCopyLoweringImpl::getCondOrInverseInReg(
MachineBasicBlock &TestMBB, MachineBasicBlock::iterator TestPos,
const DebugLoc &TestLoc, X86::CondCode Cond, CondRegArray &CondRegs) {
Register &CondReg = CondRegs[Cond];
@@ -767,7 +773,7 @@ std::pair<Register, bool> X86FlagsCopyLoweringPass::getCondOrInverseInReg(
return {InvCondReg, true};
}
-void X86FlagsCopyLoweringPass::insertTest(MachineBasicBlock &MBB,
+void X86FlagsCopyLoweringImpl::insertTest(MachineBasicBlock &MBB,
MachineBasicBlock::iterator Pos,
const DebugLoc &Loc, Register Reg) {
auto TestI =
@@ -777,7 +783,7 @@ void X86FlagsCopyLoweringPass::insertTest(MachineBasicBlock &MBB,
++NumTestsInserted;
}
-void X86FlagsCopyLoweringPass::rewriteSetCC(MachineBasicBlock &MBB,
+void X86FlagsCopyLoweringImpl::rewriteSetCC(MachineBasicBlock &MBB,
MachineBasicBlock::iterator Pos,
const DebugLoc &Loc,
MachineInstr &MI,
@@ -839,7 +845,7 @@ void X86FlagsCopyLoweringPass::rewriteSetCC(MachineBasicBlock &MBB,
MI.eraseFromParent();
}
-void X86FlagsCopyLoweringPass::rewriteArithmetic(
+void X86FlagsCopyLoweringImpl::rewriteArithmetic(
MachineBasicBlock &MBB, MachineBasicBlock::iterator Pos,
const DebugLoc &Loc, MachineInstr &MI, CondRegArray &CondRegs) {
// Arithmetic is either reading CF or OF.
@@ -914,7 +920,7 @@ static unsigned getOpcodeWithCC(unsigned Opc, X86::CondCode CC) {
#undef CASE
}
-void X86FlagsCopyLoweringPass::rewriteMI(MachineBasicBlock &MBB,
+void X86FlagsCopyLoweringImpl::rewriteMI(MachineBasicBlock &MBB,
MachineBasicBlock::iterator Pos,
const DebugLoc &Loc, MachineInstr &MI,
CondRegArray &CondRegs) {
@@ -945,3 +951,19 @@ void X86FlagsCopyLoweringPass::rewriteMI(MachineBasicBlock &MBB,
MI.findRegisterUseOperand(X86::EFLAGS, /*TRI=*/nullptr)->setIsKill(true);
LLVM_DEBUG(dbgs() << " fixed instruction: "; MI.dump());
}
+
+bool X86FlagsCopyLoweringLegacy::runOnMachineFunction(MachineFunction &MF) {
+ auto *MDTWrapper = getAnalysisIfAvailable<MachineDominatorTreeWrapperPass>();
+ MachineDominatorTree *MDT = MDTWrapper ? &MDTWrapper->getDomTree() : nullptr;
+ return X86FlagsCopyLoweringImpl(MDT).runOnMachineFunction(MF);
+}
+
+PreservedAnalyses
+X86FlagsCopyLoweringPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ MachineDominatorTree *MDT =
+ MFAM.getCachedResult<MachineDominatorTreeAnalysis>(MF);
+ bool Changed = X86FlagsCopyLoweringImpl(MDT).runOnMachineFunction(MF);
+ return Changed ? PreservedAnalyses::all()
+ : getMachineFunctionPassPreservedAnalyses();
+}
diff --git a/llvm/lib/Target/X86/X86PassRegistry.def b/llvm/lib/Target/X86/X86PassRegistry.def
index 1781e486eeddf..d77c910b52276 100644
--- a/llvm/lib/Target/X86/X86PassRegistry.def
+++ b/llvm/lib/Target/X86/X86PassRegistry.def
@@ -32,6 +32,7 @@ DUMMY_FUNCTION_PASS("x86-winehstate", WinEHStatePass())
MACHINE_FUNCTION_PASS("x86-avoid-trailing-call", X86AvoidTrailingCallPass())
MACHINE_FUNCTION_PASS("x86-dyn-alloca-expander", X86DynAllocaExpanderPass())
MACHINE_FUNCTION_PASS("x86-expand-pseudo", X86ExpandPseudoPass())
+MACHINE_FUNCTION_PASS("x86-flags-copy-lowering", X86FlagsCopyLoweringPass())
MACHINE_FUNCTION_PASS("x86-fp-stackifier", X86FPStackifierPass())
MACHINE_FUNCTION_PASS("x86-isel", X86ISelDAGToDAGPass(*this))
MACHINE_FUNCTION_PASS("x86-optimize-leas", X86OptimizeLEAsPass())
@@ -53,7 +54,6 @@ DUMMY_MACHINE_FUNCTION_PASS("x86-fixup-bw-inst", FixupBWInstPass())
DUMMY_MACHINE_FUNCTION_PASS("x86-fixup-inst-tuning", X86FixupInstTuningPass())
DUMMY_MACHINE_FUNCTION_PASS("x86-fixup-setcc", X86FixupSetCCPass())
DUMMY_MACHINE_FUNCTION_PASS("x86-fixup-vector-constants", X86FixupVectorConstantsPass())
-DUMMY_MACHINE_FUNCTION_PASS("x86-flags-copy-lowering", X86FlagsCopyLoweringPass())
DUMMY_MACHINE_FUNCTION_PASS("x86-lower-tile-copy", X86LowerTileCopy())
DUMMY_MACHINE_FUNCTION_PASS("x86-lvi-load", X86LoadValueInjectionLoadHardeningPass())
DUMMY_MACHINE_FUNCTION_PASS("x86-lvi-ret", X86LoadValueInjectionRetHardeningPass())
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
index 9feba97184ffa..9207ace376672 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.cpp
+++ b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -92,7 +92,7 @@ extern "C" LLVM_C_ABI void LLVMInitializeX86Target() {
initializeX86AvoidTrailingCallLegacyPassPass(PR);
initializeX86SpeculativeLoadHardeningPassPass(PR);
initializeX86SpeculativeExecutionSideEffectSuppressionPass(PR);
- initializeX86FlagsCopyLoweringPassPass(PR);
+ initializeX86FlagsCopyLoweringLegacyPass(PR);
initializeX86LoadValueInjectionLoadHardeningPassPass(PR);
initializeX86LoadValueInjectionRetHardeningPassPass(PR);
initializeX86OptimizeLEAsLegacyPass(PR);
@@ -523,7 +523,7 @@ void X86PassConfig::addPreRegAlloc() {
addPass(createX86SuppressAPXForRelocationPass());
addPass(createX86SpeculativeLoadHardeningPass());
- addPass(createX86FlagsCopyLoweringPass());
+ addPass(createX86FlagsCopyLoweringLegacyPass());
addPass(createX86DynAllocaExpanderLegacyPass());
if (getOptLevel() != CodeGenOptLevel::None)
diff --git a/llvm/test/CodeGen/X86/apx/flags-copy-lowering.mir b/llvm/test/CodeGen/X86/apx/flags-copy-lowering.mir
index a78e051fe65f5..bd47486009b14 100644
--- a/llvm/test/CodeGen/X86/apx/flags-copy-lowering.mir
+++ b/llvm/test/CodeGen/X86/apx/flags-copy-lowering.mir
@@ -1,7 +1,10 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple=x86_64 -run-pass x86-flags-copy-lowering -mattr=+ndd -verify-machineinstrs -o - %s | FileCheck --check-prefixes=CHECK,NDD %s
+# RUN: llc -mtriple=x86_64 -passes=x86-flags-copy-lowering -mattr=+ndd -verify-machineinstrs -o - %s | FileCheck --check-prefixes=CHECK,NDD %s
# RUN: llc -mtriple=x86_64 -run-pass x86-flags-copy-lowering -mattr=+ndd,+nf -verify-machineinstrs -o - %s | FileCheck --check-prefixes=CHECK,NDD-NF %s
+# RUN: llc -mtriple=x86_64 -passes=x86-flags-copy-lowering -mattr=+ndd,+nf -verify-machineinstrs -o - %s | FileCheck --check-prefixes=CHECK,NDD-NF %s
# RUN: llc -mtriple=x86_64 -run-pass x86-flags-copy-lowering -mattr=+ndd,+nf -x86-enable-apx-for-relocation=true -verify-machineinstrs -o - %s | FileCheck --check-prefixes=CHECK,NDD-NF %s
+# RUN: llc -mtriple=x86_64 -passes=x86-flags-copy-lowering -mattr=+ndd,+nf -x86-enable-apx-for-relocation=true -verify-machineinstrs -o - %s | FileCheck --check-prefixes=CHECK,NDD-NF %s
# Lower various interesting copy patterns of EFLAGS without using LAHF/SAHF.
diff --git a/llvm/test/CodeGen/X86/flags-copy-lowering.mir b/llvm/test/CodeGen/X86/flags-copy-lowering.mir
index a08c63c285e15..038e3baec8bc9 100644
--- a/llvm/test/CodeGen/X86/flags-copy-lowering.mir
+++ b/llvm/test/CodeGen/X86/flags-copy-lowering.mir
@@ -1,5 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple=x86_64 -run-pass x86-flags-copy-lowering -verify-machineinstrs -o - %s | FileCheck %s
+# RUN: llc -mtriple=x86_64 -passes=x86-flags-copy-lowering -verify-machineinstrs -o - %s | FileCheck %s
# Lower various interesting copy patterns of EFLAGS without using LAHF/SAHF.
...
diff --git a/llvm/test/CodeGen/X86/pr51903.mir b/llvm/test/CodeGen/X86/pr51903.mir
index 1986e9d815ef0..4a4325a12fadd 100644
--- a/llvm/test/CodeGen/X86/pr51903.mir
+++ b/llvm/test/CodeGen/X86/pr51903.mir
@@ -1,5 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc %s -o - -mtriple=x86_64-unknown-linux-gnu -run-pass=x86-flags-copy-lowering -verify-machineinstrs | FileCheck %s
+# RUN: llc %s -o - -mtriple=x86_64-unknown-linux-gnu -passes=x86-flags-copy-lowering -verify-machineinstrs | FileCheck %s
--- |
; ModuleID = 'bugpoint-reduced-simplified.ll'
More information about the llvm-commits
mailing list