[llvm] [RISCV][llvm] Support frame index in zilsd optimizer (PR #174073)

[Craig Topper via llvm-commits]

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@@ -576,7 +576,12 @@ void RISCVLoadStoreOpt::splitLdSdIntoTwo(MachineBasicBlock &MBB,
   const MachineOperand &BaseOp = MI->getOperand(2);
   Register FirstReg = FirstOp.getReg();
   Register SecondReg = SecondOp.getReg();
-  Register BaseReg = BaseOp.getReg();
+  unsigned BaseReg;
+  bool BaseIsReg = BaseOp.isReg();
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topperc wrote:

The 2044 issue can be fixed in `RISCVRegisterInfo::eliminateFrameIndex` by limiting the valid range like we do for `RISCV::PseudoRV32ZdinxLD/PseudoRV32ZdinxSD`. 

https://github.com/llvm/llvm-project/pull/174073