[llvm] [SelectionDAG] Skip chain node when updating divergence (PR #173885)

[Shilei Tian via llvm-commits]

https://github.com/shiltian created https://github.com/llvm/llvm-project/pull/173885

Fixes #173785.

>From f96f2b46b45512d4be53505f9148bbce9b4d8c01 Mon Sep 17 00:00:00 2001
From: Shilei Tian <i at tianshilei.me>
Date: Mon, 29 Dec 2025 12:02:01 -0500
Subject: [PATCH] [SelectionDAG] Skip chain node when updating divergence

Fixes #173785.
---
 .../lib/CodeGen/SelectionDAG/SelectionDAG.cpp |  3 +-
 .../chain-node-divergence-update-crash.ll     | 32 +++++++++++++++++++
 2 files changed, 34 insertions(+), 1 deletion(-)
 create mode 100644 llvm/test/CodeGen/AMDGPU/chain-node-divergence-update-crash.ll

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 891f584cf0c3a..b899dd91b06a6 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -12375,7 +12375,8 @@ void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
       const SDValue &ToOp = To[Use.getResNo()];
       ++UI;
       Use.set(ToOp);
-      To_IsDivergent |= ToOp->isDivergent();
+      if (ToOp.getValueType() != MVT::Other)
+        To_IsDivergent |= ToOp->isDivergent();
     } while (UI != UE && UI->getUser() == User);
 
     if (To_IsDivergent != From->isDivergent())
diff --git a/llvm/test/CodeGen/AMDGPU/chain-node-divergence-update-crash.ll b/llvm/test/CodeGen/AMDGPU/chain-node-divergence-update-crash.ll
new file mode 100644
index 0000000000000..e1432b95fa3dd
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/chain-node-divergence-update-crash.ll
@@ -0,0 +1,32 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 %s -o - | FileCheck %s
+
+define void @chain_node_divergence_update_crash() {
+; CHECK-LABEL: chain_node_divergence_update_crash:
+; CHECK:       ; %bb.0: ; %entry
+; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
+; CHECK-NEXT:    s_wait_expcnt 0x0
+; CHECK-NEXT:    s_wait_samplecnt 0x0
+; CHECK-NEXT:    s_wait_bvhcnt 0x0
+; CHECK-NEXT:    s_wait_kmcnt 0x0
+; CHECK-NEXT:    s_mov_b32 s0, 0
+; CHECK-NEXT:    scratch_load_b32 v4, off, s0
+; CHECK-NEXT:    s_wait_alu depctr_sa_sdst(0)
+; CHECK-NEXT:    s_mov_b32 s1, s0
+; CHECK-NEXT:    s_mov_b32 s2, s0
+; CHECK-NEXT:    s_mov_b32 s3, s0
+; CHECK-NEXT:    s_wait_alu depctr_sa_sdst(0)
+; CHECK-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; CHECK-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; CHECK-NEXT:    s_wait_loadcnt 0x0
+; CHECK-NEXT:    scratch_store_b128 v4, v[0:3], off
+; CHECK-NEXT:    scratch_store_b128 off, v[0:3], s0
+; CHECK-NEXT:    s_setpc_b64 s[30:31]
+entry:
+  %load = load ptr addrspace(5), ptr addrspace(5) null, align 8
+  store i64 0, ptr addrspace(5) %load, align 8
+  %gep = getelementptr i8, ptr addrspace(5) %load, i32 8
+  store i64 0, ptr addrspace(5) %gep, align 8
+  call void @llvm.memcpy.p5.p5.i64(ptr addrspace(5) null, ptr addrspace(5) align 8 %load, i64 16, i1 false)
+  ret void
+}