[llvm] [AMDGPU] siloadstoreopt generate REG_SEQUENCE with aligned operands (PR #162088)

[Janek van Oirschot via llvm-commits]

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@@ -0,0 +1,29 @@
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 -verify-machineinstrs -start-before=si-load-store-opt %s -o - | FileCheck %s
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JanekvO wrote:

I've had to revert the patch that shows the end-to-end as I've worked on this fix

https://github.com/llvm/llvm-project/pull/162088