[llvm] [InstCombine] Allow folding casts into PNs if both from/to types are illegal (PR #171675)
Antonio Frighetto via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 24 08:15:25 PST 2025
https://github.com/antoniofrighetto updated https://github.com/llvm/llvm-project/pull/171675
>From 6279b1f6c9e4479802d30bb17b84cb21ac85d6ec Mon Sep 17 00:00:00 2001
From: Antonio Frighetto <me at antoniofrighetto.com>
Date: Wed, 10 Dec 2025 19:32:00 +0100
Subject: [PATCH 1/3] [InstCombine] Precommit tests (NFC)
---
llvm/test/Transforms/InstCombine/cast_phi.ll | 266 +++++++++++++++++++
1 file changed, 266 insertions(+)
diff --git a/llvm/test/Transforms/InstCombine/cast_phi.ll b/llvm/test/Transforms/InstCombine/cast_phi.ll
index a3f818e013208..2ed4f5c0215a1 100644
--- a/llvm/test/Transforms/InstCombine/cast_phi.ll
+++ b/llvm/test/Transforms/InstCombine/cast_phi.ll
@@ -378,3 +378,269 @@ exit:
%ext = zext i8 %iv to i32
ret i32 %ext
}
+
+define i16 @zext_from_illegal_to_illegal_type_dest_desirable(i32 %x) {
+; CHECK-LABEL: @zext_from_illegal_to_illegal_type_dest_desirable(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 42
+; CHECK-NEXT: [[Y:%.*]] = call i3 @get_i3()
+; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[THEN:%.*]]
+; CHECK: then:
+; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[X]], 41
+; CHECK-NEXT: br i1 [[CMP2]], label [[T:%.*]], label [[F:%.*]]
+; CHECK: t:
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: f:
+; CHECK-NEXT: call void @bar()
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[P1:%.*]] = phi i3 [ [[Y]], [[T]] ], [ 3, [[F]] ], [ 1, [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[P:%.*]] = zext i3 [[P1]] to i16
+; CHECK-NEXT: ret i16 [[P]]
+;
+entry:
+ %cmp = icmp eq i32 %x, 42
+ %y = call i3 @get_i3()
+ br i1 %cmp, label %exit, label %then
+
+then:
+ %cmp2 = icmp eq i32 %x, 41
+ br i1 %cmp2, label %t, label %f
+
+t:
+ br label %exit
+
+f:
+ call void @bar()
+ br label %exit
+
+exit:
+ %p = phi i3 [ %y, %t ], [ 3, %f ], [ 1, %entry ]
+ %r = zext i3 %p to i16
+ ret i16 %r
+}
+
+; Conditional branch as terminator for a PN incoming block, cannot foldOpIntoPhi.
+define i16 @zext_from_illegal_to_illegal_type_dest_desirable_2(i32 %x) {
+; CHECK-LABEL: @zext_from_illegal_to_illegal_type_dest_desirable_2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 42
+; CHECK-NEXT: [[Y:%.*]] = call i3 @get_i3()
+; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[THEN:%.*]]
+; CHECK: then:
+; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[X]], 41
+; CHECK-NEXT: br i1 [[CMP2]], label [[T:%.*]], label [[F:%.*]]
+; CHECK: t:
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: f:
+; CHECK-NEXT: call void @bar()
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[P:%.*]] = phi i3 [ [[Y]], [[T]] ], [ [[Y]], [[F]] ], [ 1, [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[R:%.*]] = zext i3 [[P]] to i16
+; CHECK-NEXT: ret i16 [[R]]
+;
+entry:
+ %cmp = icmp eq i32 %x, 42
+ %y = call i3 @get_i3()
+ br i1 %cmp, label %exit, label %then
+
+then:
+ %cmp2 = icmp eq i32 %x, 41
+ br i1 %cmp2, label %t, label %f
+
+t:
+ br label %exit
+
+f:
+ call void @bar()
+ br label %exit
+
+exit:
+ %p = phi i3 [ %y, %t ], [ %y, %f ], [ 1, %entry ]
+ %r = zext i3 %p to i16
+ ret i16 %r
+}
+
+; SeenNonSimplifiedInVal false, cannot foldOpIntoPhi.
+define i16 @zext_from_illegal_to_illegal_type_dest_desirable_3(i32 %x) {
+; CHECK-LABEL: @zext_from_illegal_to_illegal_type_dest_desirable_3(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 42
+; CHECK-NEXT: [[Y:%.*]] = call i3 @get_i3()
+; CHECK-NEXT: br i1 [[CMP]], label [[Z:%.*]], label [[THEN:%.*]]
+; CHECK: then:
+; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[X]], 41
+; CHECK-NEXT: br i1 [[CMP2]], label [[T:%.*]], label [[F:%.*]]
+; CHECK: t:
+; CHECK-NEXT: br label [[EXIT:%.*]]
+; CHECK: f:
+; CHECK-NEXT: call void @bar()
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: z:
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[P:%.*]] = phi i3 [ [[Y]], [[T]] ], [ [[Y]], [[F]] ], [ 1, [[Z]] ]
+; CHECK-NEXT: [[R:%.*]] = zext i3 [[P]] to i16
+; CHECK-NEXT: ret i16 [[R]]
+;
+entry:
+ %cmp = icmp eq i32 %x, 42
+ %y = call i3 @get_i3()
+ br i1 %cmp, label %z, label %then
+
+then:
+ %cmp2 = icmp eq i32 %x, 41
+ br i1 %cmp2, label %t, label %f
+
+t:
+ br label %exit
+
+f:
+ call void @bar()
+ br label %exit
+
+z:
+ br label %exit
+
+exit:
+ %p = phi i3 [ %y, %t ], [ %y, %f ], [ 1, %z ]
+ %r = zext i3 %p to i16
+ ret i16 %r
+}
+
+; Reverse of zext_from_illegal_to_illegal_type_dest_desirable.
+define i16 @reverse_zext_from_illegal_to_illegal_type_dest_desirable(i32 %x) {
+; CHECK-LABEL: @reverse_zext_from_illegal_to_illegal_type_dest_desirable(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[Y:%.*]] = call i3 @get_i3()
+; CHECK-NEXT: [[TMP0:%.*]] = zext i3 [[Y]] to i16
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 42
+; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[THEN:%.*]]
+; CHECK: then:
+; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[X]], 41
+; CHECK-NEXT: br i1 [[CMP2]], label [[T:%.*]], label [[F:%.*]]
+; CHECK: t:
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: f:
+; CHECK-NEXT: call void @bar()
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[P:%.*]] = phi i16 [ [[TMP0]], [[T]] ], [ 3, [[F]] ], [ 1, [[ENTRY:%.*]] ]
+; CHECK-NEXT: ret i16 [[P]]
+;
+entry:
+ %y = call i3 @get_i3()
+ %z = zext i3 %y to i16
+ %cmp = icmp eq i32 %x, 42
+ br i1 %cmp, label %exit, label %then
+
+then: ; preds = %entry
+ %cmp2 = icmp eq i32 %x, 41
+ br i1 %cmp2, label %t, label %f
+
+t: ; preds = %then
+ br label %exit
+
+f: ; preds = %then
+ call void @bar()
+ br label %exit
+
+exit: ; preds = %f, %t, %entry
+ %p = phi i16 [ %z, %t ], [ 3, %f ], [ 1, %entry ]
+ ret i16 %p
+}
+
+; Inverse test. Cast does not get folded into the PN, despite types illegal and destination
+; type desirable, yet foldPHIArgZextsIntoPHI occurs on its reverse.
+define i16 @zext_from_illegal_to_illegal_type_dest_desirable_4(i64 %num, ptr %p) {
+; CHECK-LABEL: @zext_from_illegal_to_illegal_type_dest_desirable_4(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[IDX:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 [[NUM:%.*]]
+; CHECK-NEXT: [[VAL:%.*]] = load i8, ptr [[IDX]], align 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[NUM]], 3
+; CHECK-NEXT: br i1 [[CMP]], label [[THEN:%.*]], label [[OTHER:%.*]]
+; CHECK: then:
+; CHECK-NEXT: br label [[RETURN:%.*]]
+; CHECK: other:
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i64 [[NUM]], 12
+; CHECK-NEXT: br i1 [[CMP1]], label [[T:%.*]], label [[F:%.*]]
+; CHECK: t:
+; CHECK-NEXT: br label [[RETURN]]
+; CHECK: f:
+; CHECK-NEXT: br label [[RETURN]]
+; CHECK: return:
+; CHECK-NEXT: [[PN:%.*]] = phi i8 [ [[VAL]], [[THEN]] ], [ [[VAL]], [[T]] ], [ 1, [[F]] ]
+; CHECK-NEXT: [[Z:%.*]] = zext i8 [[PN]] to i16
+; CHECK-NEXT: ret i16 [[Z]]
+;
+entry:
+ %idx = getelementptr inbounds i8, ptr %p, i64 %num
+ %val = load i8, ptr %idx, align 1
+ %cmp = icmp ult i64 %num, 3
+ br i1 %cmp, label %then, label %other
+
+then:
+ br label %return
+
+other:
+ %cmp1 = icmp eq i64 %num, 12
+ br i1 %cmp1, label %t, label %f
+
+t:
+ br label %return
+
+f:
+ br label %return
+
+return:
+ %pn = phi i8 [ %val, %then ], [ %val, %t ], [ 1, %f ]
+ %z = zext i8 %pn to i16
+ ret i16 %z
+}
+
+define i16 @reverse_zext_from_illegal_to_illegal_type_dest_desirable_4(i64 %num, ptr %p) {
+; CHECK-LABEL: @reverse_zext_from_illegal_to_illegal_type_dest_desirable_4(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[IDX:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 [[NUM:%.*]]
+; CHECK-NEXT: [[VAL:%.*]] = load i8, ptr [[IDX]], align 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[NUM]], 3
+; CHECK-NEXT: br i1 [[CMP]], label [[THEN:%.*]], label [[OTHER:%.*]]
+; CHECK: then:
+; CHECK-NEXT: br label [[RETURN:%.*]]
+; CHECK: other:
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i64 [[NUM]], 12
+; CHECK-NEXT: br i1 [[CMP1]], label [[T:%.*]], label [[F:%.*]]
+; CHECK: t:
+; CHECK-NEXT: br label [[RETURN]]
+; CHECK: f:
+; CHECK-NEXT: br label [[RETURN]]
+; CHECK: return:
+; CHECK-NEXT: [[PN_SHRUNK:%.*]] = phi i8 [ [[VAL]], [[THEN]] ], [ [[VAL]], [[T]] ], [ 1, [[F]] ]
+; CHECK-NEXT: [[PN:%.*]] = zext i8 [[PN_SHRUNK]] to i16
+; CHECK-NEXT: ret i16 [[PN]]
+;
+entry:
+ %idx = getelementptr inbounds i8, ptr %p, i64 %num
+ %val = load i8, ptr %idx, align 1
+ %z = zext i8 %val to i16
+ %cmp = icmp ult i64 %num, 3
+ br i1 %cmp, label %then, label %other
+
+then:
+ br label %return
+
+other:
+ %cmp1 = icmp eq i64 %num, 12
+ br i1 %cmp1, label %t, label %f
+
+t:
+ br label %return
+
+f:
+ br label %return
+
+return:
+ %pn = phi i16 [ %z, %then ], [ %z, %t ], [ 1, %f ]
+ ret i16 %pn
+}
>From d1c60675ab1a20fb2934cf6633552a83b91e16df Mon Sep 17 00:00:00 2001
From: Antonio Frighetto <me at antoniofrighetto.com>
Date: Wed, 10 Dec 2025 19:32:20 +0100
Subject: [PATCH 2/3] [InstCombine] Allow folding casts into PNs if from/to
types are illegal
We already perform `foldOpIntoPhi` when the operand is a cast, dest type
width is higher than src's one, and cast types are legal. In an attempt
to allow more optimization opportunities later, it should be possible
to let the fold occur even when both from/to types are non-native, and
destination type is a desirable one; as long as `foldPHIArgZextsIntoPHI`
does not try doing the reverse, which should already be ensured.
Proofs: https://alive2.llvm.org/ce/z/WTgZeb.
Fixes: https://github.com/llvm/llvm-project/issues/145375.
---
.../Transforms/InstCombine/InstCombineCasts.cpp | 14 +++++++++++---
.../InstCombine/InstructionCombining.cpp | 2 +-
llvm/test/Transforms/InstCombine/cast_phi.ll | 4 ++--
3 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
index 0cd2c09726a2d..a97df981ab76e 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
@@ -234,9 +234,17 @@ Instruction *InstCombinerImpl::commonCastTransforms(CastInst &CI) {
// If we are casting a PHI, then fold the cast into the PHI.
if (auto *PN = dyn_cast<PHINode>(Src)) {
// Don't do this if it would create a PHI node with an illegal type from a
- // legal type.
- if (!Src->getType()->isIntegerTy() || !CI.getType()->isIntegerTy() ||
- shouldChangeType(CI.getSrcTy(), CI.getType()))
+ // legal type. However, allow this if both from/to types are illegal, and
+ // the destination type is a desirable one.
+ auto *SrcTy = Src->getType();
+ auto *DstTy = CI.getType();
+ auto BothTypesIllegal = [&](const auto *SrcTy, const auto *DstTy) {
+ return !DL.isLegalInteger(SrcTy->getScalarSizeInBits()) &&
+ !DL.isLegalInteger(DstTy->getScalarSizeInBits()) &&
+ isDesirableIntType(DstTy->getScalarSizeInBits());
+ };
+ if (!SrcTy->isIntegerTy() || !DstTy->isIntegerTy() ||
+ shouldChangeType(SrcTy, DstTy) || BothTypesIllegal(SrcTy, DstTy))
if (Instruction *NV = foldOpIntoPhi(CI, PN))
return NV;
}
diff --git a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
index 5bc9c28bed141..18c968cdba632 100644
--- a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
@@ -320,7 +320,7 @@ bool InstCombinerImpl::shouldChangeType(unsigned FromWidth,
if (ToWidth < FromWidth && isDesirableIntType(ToWidth))
return true;
- // If this is a legal or desiable integer from type, and the result would be
+ // If this is a legal or desirable integer from type, and the result would be
// an illegal type, don't do the transformation.
if ((FromLegal || isDesirableIntType(FromWidth)) && !ToLegal)
return false;
diff --git a/llvm/test/Transforms/InstCombine/cast_phi.ll b/llvm/test/Transforms/InstCombine/cast_phi.ll
index 2ed4f5c0215a1..4c3e8214663eb 100644
--- a/llvm/test/Transforms/InstCombine/cast_phi.ll
+++ b/llvm/test/Transforms/InstCombine/cast_phi.ll
@@ -389,13 +389,13 @@ define i16 @zext_from_illegal_to_illegal_type_dest_desirable(i32 %x) {
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[X]], 41
; CHECK-NEXT: br i1 [[CMP2]], label [[T:%.*]], label [[F:%.*]]
; CHECK: t:
+; CHECK-NEXT: [[TMP0:%.*]] = zext i3 [[Y]] to i16
; CHECK-NEXT: br label [[EXIT]]
; CHECK: f:
; CHECK-NEXT: call void @bar()
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
-; CHECK-NEXT: [[P1:%.*]] = phi i3 [ [[Y]], [[T]] ], [ 3, [[F]] ], [ 1, [[ENTRY:%.*]] ]
-; CHECK-NEXT: [[P:%.*]] = zext i3 [[P1]] to i16
+; CHECK-NEXT: [[P:%.*]] = phi i16 [ [[TMP0]], [[T]] ], [ 3, [[F]] ], [ 1, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i16 [[P]]
;
entry:
>From 35478f16b34bf1f6733355b1aac5c1e8cbc41861 Mon Sep 17 00:00:00 2001
From: Antonio Frighetto <me at antoniofrighetto.com>
Date: Wed, 24 Dec 2025 16:58:12 +0100
Subject: [PATCH 3/3] !fixup move to shouldChangeType
Co-authored-by: Yingwei Zheng <dtcxzyw2333 at gmail.com>
---
.../InstCombine/InstCombineCasts.cpp | 15 +++-------
.../InstCombine/InstructionCombining.cpp | 2 +-
.../Transforms/InstCombine/cmp-intrinsic.ll | 4 +--
.../lshr-trunc-sext-to-ashr-sext.ll | 28 ++++++++++++-------
.../InstCombine/sext-of-trunc-nsw.ll | 18 +++++++-----
5 files changed, 36 insertions(+), 31 deletions(-)
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
index a97df981ab76e..940c43fe90faa 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
@@ -234,17 +234,10 @@ Instruction *InstCombinerImpl::commonCastTransforms(CastInst &CI) {
// If we are casting a PHI, then fold the cast into the PHI.
if (auto *PN = dyn_cast<PHINode>(Src)) {
// Don't do this if it would create a PHI node with an illegal type from a
- // legal type. However, allow this if both from/to types are illegal, and
- // the destination type is a desirable one.
- auto *SrcTy = Src->getType();
- auto *DstTy = CI.getType();
- auto BothTypesIllegal = [&](const auto *SrcTy, const auto *DstTy) {
- return !DL.isLegalInteger(SrcTy->getScalarSizeInBits()) &&
- !DL.isLegalInteger(DstTy->getScalarSizeInBits()) &&
- isDesirableIntType(DstTy->getScalarSizeInBits());
- };
- if (!SrcTy->isIntegerTy() || !DstTy->isIntegerTy() ||
- shouldChangeType(SrcTy, DstTy) || BothTypesIllegal(SrcTy, DstTy))
+ // legal type. Allow this if both from/to types are illegal, and the
+ // destination type is a desirable one.
+ if (!Src->getType()->isIntegerTy() || !CI.getType()->isIntegerTy() ||
+ shouldChangeType(CI.getSrcTy(), CI.getType()))
if (Instruction *NV = foldOpIntoPhi(CI, PN))
return NV;
}
diff --git a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
index 18c968cdba632..0bf59dcfe3358 100644
--- a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
@@ -328,7 +328,7 @@ bool InstCombinerImpl::shouldChangeType(unsigned FromWidth,
// Otherwise, if both are illegal, do not increase the size of the result. We
// do allow things like i160 -> i64, but not i64 -> i160.
if (!FromLegal && !ToLegal && ToWidth > FromWidth)
- return false;
+ return isDesirableIntType(ToWidth);
return true;
}
diff --git a/llvm/test/Transforms/InstCombine/cmp-intrinsic.ll b/llvm/test/Transforms/InstCombine/cmp-intrinsic.ll
index 19c4cc979d4ba..899aec2d5351b 100644
--- a/llvm/test/Transforms/InstCombine/cmp-intrinsic.ll
+++ b/llvm/test/Transforms/InstCombine/cmp-intrinsic.ll
@@ -620,7 +620,7 @@ define i1 @trunc_cttz_false_ult_other_i32_i6_extra_use(i32 %x) {
; CHECK-NEXT: [[TZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[TRUNC:%.*]] = trunc nuw i32 [[TZ]] to i6
; CHECK-NEXT: call void @use6(i6 [[TRUNC]])
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i6 [[TRUNC]], 7
+; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ult i32 [[TZ]], 7
; CHECK-NEXT: ret i1 [[CMP]]
;
%tz = tail call i32 @llvm.cttz.i32(i32 %x, i1 false)
@@ -722,7 +722,7 @@ define i1 @trunc_ctlz_false_ugt_other_i32_i6_extra_use(i32 %x) {
; CHECK-NEXT: [[LZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[TRUNC:%.*]] = trunc nuw i32 [[LZ]] to i6
; CHECK-NEXT: call void @use6(i6 [[TRUNC]])
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i6 [[TRUNC]], 4
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X]], 134217728
; CHECK-NEXT: ret i1 [[CMP]]
;
%lz = tail call i32 @llvm.ctlz.i32(i32 %x, i1 false)
diff --git a/llvm/test/Transforms/InstCombine/lshr-trunc-sext-to-ashr-sext.ll b/llvm/test/Transforms/InstCombine/lshr-trunc-sext-to-ashr-sext.ll
index 03188c0c590c4..955cfb6a7e4e2 100644
--- a/llvm/test/Transforms/InstCombine/lshr-trunc-sext-to-ashr-sext.ll
+++ b/llvm/test/Transforms/InstCombine/lshr-trunc-sext-to-ashr-sext.ll
@@ -13,8 +13,10 @@ declare void @usevec4(<2 x i4>)
define i16 @t0(i8 %x) {
; CHECK-LABEL: @t0(
-; CHECK-NEXT: [[TMP1:%.*]] = ashr i8 [[X:%.*]], 4
-; CHECK-NEXT: [[C:%.*]] = sext i8 [[TMP1]] to i16
+; CHECK-NEXT: [[A:%.*]] = lshr i8 [[X:%.*]], 4
+; CHECK-NEXT: [[B:%.*]] = zext nneg i8 [[A]] to i16
+; CHECK-NEXT: [[SEXT:%.*]] = shl nuw i16 [[B]], 12
+; CHECK-NEXT: [[C:%.*]] = ashr exact i16 [[SEXT]], 12
; CHECK-NEXT: ret i16 [[C]]
;
%a = lshr i8 %x, 4
@@ -25,8 +27,10 @@ define i16 @t0(i8 %x) {
define i16 @t1(i8 %x) {
; CHECK-LABEL: @t1(
-; CHECK-NEXT: [[TMP1:%.*]] = ashr i8 [[X:%.*]], 5
-; CHECK-NEXT: [[C:%.*]] = sext i8 [[TMP1]] to i16
+; CHECK-NEXT: [[A:%.*]] = lshr i8 [[X:%.*]], 5
+; CHECK-NEXT: [[B:%.*]] = zext nneg i8 [[A]] to i16
+; CHECK-NEXT: [[SEXT:%.*]] = shl nuw i16 [[B]], 13
+; CHECK-NEXT: [[C:%.*]] = ashr exact i16 [[SEXT]], 13
; CHECK-NEXT: ret i16 [[C]]
;
%a = lshr i8 %x, 5
@@ -37,8 +41,10 @@ define i16 @t1(i8 %x) {
define i16 @t2(i7 %x) {
; CHECK-LABEL: @t2(
-; CHECK-NEXT: [[TMP1:%.*]] = ashr i7 [[X:%.*]], 3
-; CHECK-NEXT: [[C:%.*]] = sext i7 [[TMP1]] to i16
+; CHECK-NEXT: [[A:%.*]] = lshr i7 [[X:%.*]], 3
+; CHECK-NEXT: [[B:%.*]] = zext nneg i7 [[A]] to i16
+; CHECK-NEXT: [[SEXT:%.*]] = shl nuw i16 [[B]], 12
+; CHECK-NEXT: [[C:%.*]] = ashr exact i16 [[SEXT]], 12
; CHECK-NEXT: ret i16 [[C]]
;
%a = lshr i7 %x, 3
@@ -52,8 +58,9 @@ define i16 @t2(i7 %x) {
define i16 @n3(i8 %x) {
; CHECK-LABEL: @n3(
; CHECK-NEXT: [[A:%.*]] = lshr i8 [[X:%.*]], 3
-; CHECK-NEXT: [[B:%.*]] = trunc i8 [[A]] to i4
-; CHECK-NEXT: [[C:%.*]] = sext i4 [[B]] to i16
+; CHECK-NEXT: [[B:%.*]] = zext nneg i8 [[A]] to i16
+; CHECK-NEXT: [[SEXT:%.*]] = shl i16 [[B]], 12
+; CHECK-NEXT: [[C:%.*]] = ashr exact i16 [[SEXT]], 12
; CHECK-NEXT: ret i16 [[C]]
;
%a = lshr i8 %x, 3
@@ -126,8 +133,9 @@ define i16 @t8_extrause1(i8 %x) {
; CHECK-LABEL: @t8_extrause1(
; CHECK-NEXT: [[A:%.*]] = lshr i8 [[X:%.*]], 4
; CHECK-NEXT: call void @use8(i8 [[A]])
-; CHECK-NEXT: [[TMP1:%.*]] = ashr i8 [[X]], 4
-; CHECK-NEXT: [[C:%.*]] = sext i8 [[TMP1]] to i16
+; CHECK-NEXT: [[B:%.*]] = zext nneg i8 [[A]] to i16
+; CHECK-NEXT: [[SEXT:%.*]] = shl nuw i16 [[B]], 12
+; CHECK-NEXT: [[C:%.*]] = ashr exact i16 [[SEXT]], 12
; CHECK-NEXT: ret i16 [[C]]
;
%a = lshr i8 %x, 4 ; has extra use, but we can deal with that
diff --git a/llvm/test/Transforms/InstCombine/sext-of-trunc-nsw.ll b/llvm/test/Transforms/InstCombine/sext-of-trunc-nsw.ll
index 4128a15d8d7ce..4352b435b4a18 100644
--- a/llvm/test/Transforms/InstCombine/sext-of-trunc-nsw.ll
+++ b/llvm/test/Transforms/InstCombine/sext-of-trunc-nsw.ll
@@ -13,7 +13,9 @@ define i16 @t0(i8 %x) {
; CHECK-LABEL: @t0(
; CHECK-NEXT: [[A:%.*]] = ashr i8 [[X:%.*]], 5
; CHECK-NEXT: call void @use8(i8 [[A]])
-; CHECK-NEXT: [[C:%.*]] = sext i8 [[A]] to i16
+; CHECK-NEXT: [[B:%.*]] = zext i8 [[A]] to i16
+; CHECK-NEXT: [[SEXT:%.*]] = shl i16 [[B]], 12
+; CHECK-NEXT: [[C:%.*]] = ashr exact i16 [[SEXT]], 12
; CHECK-NEXT: ret i16 [[C]]
;
%a = ashr i8 %x, 5
@@ -27,7 +29,9 @@ define i16 @t1(i8 %x) {
; CHECK-LABEL: @t1(
; CHECK-NEXT: [[A:%.*]] = ashr i8 [[X:%.*]], 4
; CHECK-NEXT: call void @use8(i8 [[A]])
-; CHECK-NEXT: [[C:%.*]] = sext i8 [[A]] to i16
+; CHECK-NEXT: [[B:%.*]] = zext i8 [[A]] to i16
+; CHECK-NEXT: [[SEXT:%.*]] = shl i16 [[B]], 12
+; CHECK-NEXT: [[C:%.*]] = ashr exact i16 [[SEXT]], 12
; CHECK-NEXT: ret i16 [[C]]
;
%a = ashr i8 %x, 4
@@ -42,8 +46,9 @@ define i16 @n2(i8 %x) {
; CHECK-LABEL: @n2(
; CHECK-NEXT: [[A:%.*]] = ashr i8 [[X:%.*]], 3
; CHECK-NEXT: call void @use8(i8 [[A]])
-; CHECK-NEXT: [[B:%.*]] = trunc i8 [[A]] to i4
-; CHECK-NEXT: [[C:%.*]] = sext i4 [[B]] to i16
+; CHECK-NEXT: [[B:%.*]] = zext i8 [[A]] to i16
+; CHECK-NEXT: [[SEXT:%.*]] = shl i16 [[B]], 12
+; CHECK-NEXT: [[C:%.*]] = ashr exact i16 [[SEXT]], 12
; CHECK-NEXT: ret i16 [[C]]
;
%a = ashr i8 %x, 3
@@ -145,9 +150,8 @@ define i24 @wide_source_matching_signbits(i32 %x) {
}
define i32 @wide_source_matching_signbits_has_nsw_flag(i64 %i) {
-; CHECK-LABEL: define i32 @wide_source_matching_signbits_has_nsw_flag(
-; CHECK-SAME: i64 [[I:%.*]]) {
-; CHECK-NEXT: [[A:%.*]] = trunc nsw i64 [[I]] to i32
+; CHECK-LABEL: @wide_source_matching_signbits_has_nsw_flag(
+; CHECK-NEXT: [[A:%.*]] = trunc nsw i64 [[I:%.*]] to i32
; CHECK-NEXT: ret i32 [[A]]
;
%a = trunc nsw i64 %i to i16
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