[llvm] [NewPM][X86] Port X86ExpandPseudo to NPM (PR #173463)
Aiden Grossman via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 23 23:11:43 PST 2025
https://github.com/boomanaiden154 created https://github.com/llvm/llvm-project/pull/173463
Porting this over and adding it to the pipeline means we only need to port AsmPrinter to fully lower very simple functions on X86.
>From c4fc2a0a3d4bb7a93837032e280d8b622df53e56 Mon Sep 17 00:00:00 2001
From: Aiden Grossman <aidengrossman at google.com>
Date: Wed, 24 Dec 2025 07:03:17 +0000
Subject: [PATCH] [NewPM][X86] Port X86ExpandPseudo to NPM
Porting this over and adding it to the pipeline means we only need to
port AsmPrinter to fully lower very simple functions on X86.
---
llvm/lib/Target/X86/X86.h | 10 +-
llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp | 5 +
llvm/lib/Target/X86/X86ExpandPseudo.cpp | 105 ++++++++++++------
llvm/lib/Target/X86/X86PassRegistry.def | 2 +-
llvm/lib/Target/X86/X86TargetMachine.cpp | 4 +-
.../test/CodeGen/X86/expand-call-rvmarker.mir | 3 +-
llvm/test/CodeGen/X86/tailcall-pseudo-64.mir | 4 +-
llvm/test/CodeGen/X86/tailcall-pseudo.mir | 3 +-
8 files changed, 93 insertions(+), 43 deletions(-)
diff --git a/llvm/lib/Target/X86/X86.h b/llvm/lib/Target/X86/X86.h
index 97848bec7127e..b949453031dfe 100644
--- a/llvm/lib/Target/X86/X86.h
+++ b/llvm/lib/Target/X86/X86.h
@@ -141,7 +141,13 @@ FunctionPass *createX86WinEHStatePass();
/// instructions into a sequence of actual instructions. This pass
/// must run after prologue/epilogue insertion and before lowering
/// the MachineInstr to MC.
-FunctionPass *createX86ExpandPseudoPass();
+class X86ExpandPseudoPass : public PassInfoMixin<X86ExpandPseudoPass> {
+public:
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+};
+
+FunctionPass *createX86ExpandPseudoLegacyPass();
/// This pass converts X86 cmov instructions into branch when profitable.
FunctionPass *createX86CmovConverterPass();
@@ -243,7 +249,7 @@ void initializeX86DAGToDAGISelLegacyPass(PassRegistry &);
void initializeX86DomainReassignmentPass(PassRegistry &);
void initializeX86DynAllocaExpanderLegacyPass(PassRegistry &);
void initializeX86ExecutionDomainFixPass(PassRegistry &);
-void initializeX86ExpandPseudoPass(PassRegistry &);
+void initializeX86ExpandPseudoLegacyPass(PassRegistry &);
void initializeX86FPStackifierLegacyPass(PassRegistry &);
void initializeX86FastPreTileConfigPass(PassRegistry &);
void initializeX86FastTileConfigPass(PassRegistry &);
diff --git a/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp b/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
index 26a7aebb25f8c..a82ea07f5e013 100644
--- a/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+++ b/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
@@ -32,6 +32,7 @@ class X86CodeGenPassBuilder
void addPreISel(PassManagerWrapper &PMW) const;
void addAsmPrinter(PassManagerWrapper &PMW, CreateMCStreamer) const;
Error addInstSelector(PassManagerWrapper &PMW) const;
+ void addPreSched2(PassManagerWrapper &PMW) const;
};
void X86CodeGenPassBuilder::addPreISel(PassManagerWrapper &PMW) const {
@@ -49,6 +50,10 @@ Error X86CodeGenPassBuilder::addInstSelector(PassManagerWrapper &PMW) const {
return Error::success();
}
+void X86CodeGenPassBuilder::addPreSched2(PassManagerWrapper &PMW) const {
+ addMachineFunctionPass(X86ExpandPseudoPass(), PMW);
+}
+
} // namespace
void X86TargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) {
diff --git a/llvm/lib/Target/X86/X86ExpandPseudo.cpp b/llvm/lib/Target/X86/X86ExpandPseudo.cpp
index 6a18086cae29f..7a1fac75c188a 100644
--- a/llvm/lib/Target/X86/X86ExpandPseudo.cpp
+++ b/llvm/lib/Target/X86/X86ExpandPseudo.cpp
@@ -18,45 +18,31 @@
#include "X86MachineFunctionInfo.h"
#include "X86Subtarget.h"
#include "llvm/CodeGen/LivePhysRegs.h"
+#include "llvm/CodeGen/MachineDominators.h"
+#include "llvm/CodeGen/MachineFunctionAnalysisManager.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/Passes.h" // For IDs of passes that are preserved.
+#include "llvm/IR/Analysis.h"
#include "llvm/IR/EHPersonalities.h"
#include "llvm/IR/GlobalValue.h"
#include "llvm/Target/TargetMachine.h"
using namespace llvm;
-#define DEBUG_TYPE "x86-pseudo"
+#define DEBUG_TYPE "x86-expand-pseudo"
#define X86_EXPAND_PSEUDO_NAME "X86 pseudo instruction expansion pass"
namespace {
-class X86ExpandPseudo : public MachineFunctionPass {
+class X86ExpandPseudoImpl {
public:
- static char ID;
- X86ExpandPseudo() : MachineFunctionPass(ID) {}
-
- void getAnalysisUsage(AnalysisUsage &AU) const override {
- AU.setPreservesCFG();
- AU.addPreservedID(MachineLoopInfoID);
- AU.addPreservedID(MachineDominatorsID);
- MachineFunctionPass::getAnalysisUsage(AU);
- }
-
const X86Subtarget *STI = nullptr;
const X86InstrInfo *TII = nullptr;
const X86RegisterInfo *TRI = nullptr;
const X86MachineFunctionInfo *X86FI = nullptr;
const X86FrameLowering *X86FL = nullptr;
- bool runOnMachineFunction(MachineFunction &MF) override;
-
- MachineFunctionProperties getRequiredProperties() const override {
- return MachineFunctionProperties().setNoVRegs();
- }
-
- StringRef getPassName() const override {
- return "X86 pseudo instruction expansion pass";
- }
+ bool runOnMachineFunction(MachineFunction &MF);
private:
void expandICallBranchFunnel(MachineBasicBlock *MBB,
@@ -78,14 +64,42 @@ class X86ExpandPseudo : public MachineFunctionPass {
MachineBasicBlock *EntryBlk,
MachineBasicBlock::iterator VAStartPseudoInstr) const;
};
-char X86ExpandPseudo::ID = 0;
+class X86ExpandPseudoLegacy : public MachineFunctionPass {
+public:
+ static char ID;
+ X86ExpandPseudoLegacy() : MachineFunctionPass(ID) {}
+
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
+ AU.setPreservesCFG();
+ AU.addPreservedID(MachineLoopInfoID);
+ AU.addPreservedID(MachineDominatorsID);
+ MachineFunctionPass::getAnalysisUsage(AU);
+ }
+
+ const X86Subtarget *STI = nullptr;
+ const X86InstrInfo *TII = nullptr;
+ const X86RegisterInfo *TRI = nullptr;
+ const X86MachineFunctionInfo *X86FI = nullptr;
+ const X86FrameLowering *X86FL = nullptr;
+
+ bool runOnMachineFunction(MachineFunction &MF) override;
+
+ MachineFunctionProperties getRequiredProperties() const override {
+ return MachineFunctionProperties().setNoVRegs();
+ }
+
+ StringRef getPassName() const override {
+ return "X86 pseudo instruction expansion pass";
+ }
+};
+char X86ExpandPseudoLegacy::ID = 0;
} // End anonymous namespace.
-INITIALIZE_PASS(X86ExpandPseudo, DEBUG_TYPE, X86_EXPAND_PSEUDO_NAME, false,
- false)
+INITIALIZE_PASS(X86ExpandPseudoLegacy, DEBUG_TYPE, X86_EXPAND_PSEUDO_NAME,
+ false, false)
-void X86ExpandPseudo::expandICallBranchFunnel(
+void X86ExpandPseudoImpl::expandICallBranchFunnel(
MachineBasicBlock *MBB, MachineBasicBlock::iterator MBBI) {
MachineBasicBlock *JTMBB = MBB;
MachineInstr *JTInst = &*MBBI;
@@ -186,8 +200,8 @@ void X86ExpandPseudo::expandICallBranchFunnel(
JTMBB->erase(JTInst);
}
-void X86ExpandPseudo::expandCALL_RVMARKER(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI) {
+void X86ExpandPseudoImpl::expandCALL_RVMARKER(
+ MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) {
// Expand CALL_RVMARKER pseudo to call instruction, followed by the special
//"movq %rax, %rdi" marker.
MachineInstr &MI = *MBBI;
@@ -257,8 +271,8 @@ void X86ExpandPseudo::expandCALL_RVMARKER(MachineBasicBlock &MBB,
/// If \p MBBI is a pseudo instruction, this method expands
/// it to the corresponding (sequence of) actual instruction(s).
/// \returns true if \p MBBI has been expanded.
-bool X86ExpandPseudo::expandMI(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI) {
+bool X86ExpandPseudoImpl::expandMI(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI) {
MachineInstr &MI = *MBBI;
unsigned Opcode = MI.getOpcode();
const DebugLoc &DL = MBBI->getDebugLoc();
@@ -813,7 +827,7 @@ bool X86ExpandPseudo::expandMI(MachineBasicBlock &MBB,
// | |
// | |
//
-void X86ExpandPseudo::expandVastartSaveXmmRegs(
+void X86ExpandPseudoImpl::expandVastartSaveXmmRegs(
MachineBasicBlock *EntryBlk,
MachineBasicBlock::iterator VAStartPseudoInstr) const {
assert(VAStartPseudoInstr->getOpcode() == X86::VASTART_SAVE_XMM_REGS);
@@ -898,7 +912,7 @@ void X86ExpandPseudo::expandVastartSaveXmmRegs(
/// Expand all pseudo instructions contained in \p MBB.
/// \returns true if any expansion occurred for \p MBB.
-bool X86ExpandPseudo::expandMBB(MachineBasicBlock &MBB) {
+bool X86ExpandPseudoImpl::expandMBB(MachineBasicBlock &MBB) {
bool Modified = false;
// MBBI may be invalidated by the expansion.
@@ -912,7 +926,8 @@ bool X86ExpandPseudo::expandMBB(MachineBasicBlock &MBB) {
return Modified;
}
-bool X86ExpandPseudo::expandPseudosWhichAffectControlFlow(MachineFunction &MF) {
+bool X86ExpandPseudoImpl::expandPseudosWhichAffectControlFlow(
+ MachineFunction &MF) {
// Currently pseudo which affects control flow is only
// X86::VASTART_SAVE_XMM_REGS which is located in Entry block.
// So we do not need to evaluate other blocks.
@@ -926,7 +941,7 @@ bool X86ExpandPseudo::expandPseudosWhichAffectControlFlow(MachineFunction &MF) {
return false;
}
-bool X86ExpandPseudo::runOnMachineFunction(MachineFunction &MF) {
+bool X86ExpandPseudoImpl::runOnMachineFunction(MachineFunction &MF) {
STI = &MF.getSubtarget<X86Subtarget>();
TII = STI->getInstrInfo();
TRI = STI->getRegisterInfo();
@@ -941,6 +956,26 @@ bool X86ExpandPseudo::runOnMachineFunction(MachineFunction &MF) {
}
/// Returns an instance of the pseudo instruction expansion pass.
-FunctionPass *llvm::createX86ExpandPseudoPass() {
- return new X86ExpandPseudo();
+FunctionPass *llvm::createX86ExpandPseudoLegacyPass() {
+ return new X86ExpandPseudoLegacy();
+}
+
+bool X86ExpandPseudoLegacy::runOnMachineFunction(MachineFunction &MF) {
+ X86ExpandPseudoImpl Impl;
+ return Impl.runOnMachineFunction(MF);
+}
+
+PreservedAnalyses
+X86ExpandPseudoPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ X86ExpandPseudoImpl Impl;
+ bool Changed = Impl.runOnMachineFunction(MF);
+ if (!Changed)
+ return PreservedAnalyses::all();
+
+ PreservedAnalyses PA = PreservedAnalyses::none();
+ PA.preserveSet<CFGAnalyses>();
+ /*PA.preserve<MachineLoopInfo>();
+ PA.preserve<MachineDominatorTree>();*/
+ return PA;
}
diff --git a/llvm/lib/Target/X86/X86PassRegistry.def b/llvm/lib/Target/X86/X86PassRegistry.def
index b80ad38c146df..ecdd40b2d1571 100644
--- a/llvm/lib/Target/X86/X86PassRegistry.def
+++ b/llvm/lib/Target/X86/X86PassRegistry.def
@@ -30,6 +30,7 @@ DUMMY_FUNCTION_PASS("x86-winehstate", WinEHStatePass())
#define MACHINE_FUNCTION_PASS(NAME, CREATE_PASS)
#endif
MACHINE_FUNCTION_PASS("x86-avoid-trailing-call", X86AvoidTrailingCallPass())
+MACHINE_FUNCTION_PASS("x86-expand-pseudo", X86ExpandPseudoPass())
MACHINE_FUNCTION_PASS("x86-dyn-alloca-expander", X86DynAllocaExpanderPass())
MACHINE_FUNCTION_PASS("x86-fp-stackifier", X86FPStackifierPass())
MACHINE_FUNCTION_PASS("x86-isel", X86ISelDAGToDAGPass(*this))
@@ -56,7 +57,6 @@ DUMMY_MACHINE_FUNCTION_PASS("x86-lower-tile-copy", X86LowerTileCopy())
DUMMY_MACHINE_FUNCTION_PASS("x86-lvi-load", X86LoadValueInjectionLoadHardeningPass())
DUMMY_MACHINE_FUNCTION_PASS("x86-lvi-ret", X86LoadValueInjectionRetHardeningPass())
DUMMY_MACHINE_FUNCTION_PASS("x86-optimize-LEAs", X86OptimizeLEAPass())
-DUMMY_MACHINE_FUNCTION_PASS("x86-pseudo", X86ExpandPseudo())
DUMMY_MACHINE_FUNCTION_PASS("x86-return-thunks", X86ReturnThunks())
DUMMY_MACHINE_FUNCTION_PASS("x86-seses", X86SpeculativeExecutionSideEffectSuppression())
DUMMY_MACHINE_FUNCTION_PASS("x86-slh", X86SpeculativeLoadHardeningPass())
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
index 713df63479987..66341e5ab960e 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.cpp
+++ b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -85,7 +85,7 @@ extern "C" LLVM_C_ABI void LLVMInitializeX86Target() {
initializeX86FastTileConfigPass(PR);
initializeKCFIPass(PR);
initializeX86LowerTileCopyPass(PR);
- initializeX86ExpandPseudoPass(PR);
+ initializeX86ExpandPseudoLegacyPass(PR);
initializeX86ExecutionDomainFixPass(PR);
initializeX86DomainReassignmentPass(PR);
initializeX86AvoidSFBPassPass(PR);
@@ -541,7 +541,7 @@ void X86PassConfig::addPostRegAlloc() {
}
void X86PassConfig::addPreSched2() {
- addPass(createX86ExpandPseudoPass());
+ addPass(createX86ExpandPseudoLegacyPass());
addPass(createKCFIPass());
}
diff --git a/llvm/test/CodeGen/X86/expand-call-rvmarker.mir b/llvm/test/CodeGen/X86/expand-call-rvmarker.mir
index 33069fc486a46..4eb80716a2271 100644
--- a/llvm/test/CodeGen/X86/expand-call-rvmarker.mir
+++ b/llvm/test/CodeGen/X86/expand-call-rvmarker.mir
@@ -1,4 +1,5 @@
-# RUN: llc -o - -run-pass=x86-pseudo -verify-machineinstrs %s | FileCheck %s
+# RUN: llc -o - -run-pass=x86-expand-pseudo -verify-machineinstrs %s | FileCheck %s
+# RUN: llc -o - -passes=x86-expand-pseudo -verify-machineinstrs %s | FileCheck %s
--- |
target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/X86/tailcall-pseudo-64.mir b/llvm/test/CodeGen/X86/tailcall-pseudo-64.mir
index 71d2ebdb06b47..878fc3f874c30 100644
--- a/llvm/test/CodeGen/X86/tailcall-pseudo-64.mir
+++ b/llvm/test/CodeGen/X86/tailcall-pseudo-64.mir
@@ -1,4 +1,6 @@
-#RUN: llc -verify-machineinstrs -mtriple=x86_64-apple-darwin -o - -run-pass=x86-pseudo %s | FileCheck %s
+#RUN: llc -verify-machineinstrs -mtriple=x86_64-apple-darwin -o - -run-pass=x86-expand-pseudo %s | FileCheck %s
+#RUN: llc -verify-machineinstrs -mtriple=x86_64-apple-darwin -o - -passes=x86-expand-pseudo %s | FileCheck %s
+
---
name: tail_call_fail_64
tracksRegLiveness: true
diff --git a/llvm/test/CodeGen/X86/tailcall-pseudo.mir b/llvm/test/CodeGen/X86/tailcall-pseudo.mir
index af52a4ddef759..306132f10e5b3 100644
--- a/llvm/test/CodeGen/X86/tailcall-pseudo.mir
+++ b/llvm/test/CodeGen/X86/tailcall-pseudo.mir
@@ -1,4 +1,5 @@
-#RUN: llc -verify-machineinstrs -mtriple=i386-apple-darwin -o - -run-pass=x86-pseudo %s | FileCheck %s
+#RUN: llc -verify-machineinstrs -mtriple=i386-apple-darwin -o - -run-pass=x86-expand-pseudo %s | FileCheck %s
+#RUN: llc -verify-machineinstrs -mtriple=i386-apple-darwin -o - -passes=x86-expand-pseudo %s | FileCheck %s
---
name: tail_call_fail
tracksRegLiveness: true
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