[llvm] Try To Guess SGMasks for Inline Asm Instructions (PR #155491)

[Patrick Simmons via llvm-commits]

================
@@ -2391,6 +2391,56 @@ bool SchedGroup::canAddMI(const MachineInstr &MI) const {
   if (MI.isMetaInstruction())
     Result = false;
 
+  else if (MI.isInlineAsm()) {
+    const SIRegisterInfo &TRI = TII->getRegisterInfo();
+    auto &MRI = MI.getParent()->getParent()->getRegInfo();
+    bool SGPR_used = false, VGPR_used = false, VMFMA_used = false,
+         VReg32_used = false, MayLoad = MI.mayLoad(), MayStore = MI.mayStore();
----------------
linuxrocks123 wrote:

I added `LLVM_ENABLE_BITMASK_ENUMS_IN_NAMESPACE`.  Re mayLoad()/mayStore(), please see MachineInstr.h:1158 and MachineInstr.h:1171 for what I believe is the code implementing the inline asm special case.

https://github.com/llvm/llvm-project/pull/155491