[llvm] [X86][GlobalISel] Added support for FNEG (PR #167919)
Evgenii Kudriashov via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 22 08:36:51 PST 2025
================
@@ -109,6 +109,9 @@ struct X86OutgoingValueHandler : public CallLowering::OutgoingValueHandler {
const CCValAssign &VA) override {
MIB.addUse(PhysReg, RegState::Implicit);
Register ExtReg = extendRegister(ValVReg, VA);
+ if ((VA.getLocReg() == X86::FP0 || VA.getLocReg() == X86::FP1) &&
+ STI.getTargetLowering()->isScalarFPTypeInSSEReg(VA.getValVT()))
+ ExtReg = MIRBuilder.buildFPExt(LLT::scalar(80), ExtReg).getReg(0);
----------------
e-kud wrote:
@arsenm this code is taken from https://github.com/llvm/llvm-project/blob/283813a3c8cbb26873fcb20b38d9f6299a0c1382/llvm/lib/Target/X86/X86ISelLoweringCall.cpp#L811-L820
I had a thought that it should be handled in CC itself, but haven't spent any time on it, as SDAG special cases it as well. So do you mean that generally it should be fixed in CC for both, GlobalISel and SDAG?
I think this special case is just to avoid crashing. What is the real case scenario of 32 bit target code with sse?
https://github.com/llvm/llvm-project/pull/167919
More information about the llvm-commits
mailing list