[llvm] [PowerPC] set libcall lowering for fp setcc ops on SPE boards (PR #153238)

[Erik Enikeev via llvm-commits]

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@@ -552,8 +552,23 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM,
     setOperationAction(ISD::UINT_TO_FP, MVT::i32, Legal);
 
     // SPE supports signaling compare of f32/f64.
-    setOperationAction(ISD::STRICT_FSETCCS, MVT::f32, Legal);
-    setOperationAction(ISD::STRICT_FSETCCS, MVT::f64, Legal);
+    // But it doesn't comply IEEE-754 rules for comparing
+    // special values like NaNs, Infs.
+    if (!getTargetMachine().Options.NoNaNsFPMath ||
+        !getTargetMachine().Options.NoInfsFPMath) {
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Varnike wrote:

> I didn't look too closely at whatever the original was doing.

It basically used the libcall expansion that is already implemented in `LowerSETCC` for `f128` and is applicable to `f32`/`f64` ops as well. Roland suggested moving this functionality to `LegalizeDAG.cpp`, which has been done in the current version of the patch.


https://github.com/llvm/llvm-project/pull/153238