[llvm] [AMDGPU]: Fix mir-canon-multi-def.mir test (PR #173243)

Frederik Harwath via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 22 03:50:58 PST 2025


https://github.com/frederik-h created https://github.com/llvm/llvm-project/pull/173243

The test fails on s390x because the hash values are different.

Use regex patterns to fix this problem.

>From 08b4bc6996bf9aad0df1688eb854750ec3a39325 Mon Sep 17 00:00:00 2001
From: Frederik Harwath <fharwath at amd.com>
Date: Mon, 22 Dec 2025 06:47:05 -0500
Subject: [PATCH] [AMDGPU]: Fix mir-canon-multi-def.mir test

The test fails on s390x because the hash values are different.

Use regex patterns to fix this problem.
---
 llvm/test/CodeGen/MIR/AMDGPU/mir-canon-multi-def.mir | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/llvm/test/CodeGen/MIR/AMDGPU/mir-canon-multi-def.mir b/llvm/test/CodeGen/MIR/AMDGPU/mir-canon-multi-def.mir
index 6827057369970..efeb34603782c 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/mir-canon-multi-def.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/mir-canon-multi-def.mir
@@ -1,4 +1,3 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
 # RUN: llc -mtriple=amdgcn -run-pass mir-canonicalizer -mir-vreg-namer-use-stable-hash -verify-machineinstrs %s -o - | FileCheck %s
 
 ---
@@ -11,9 +10,9 @@ body:             |
     ; CHECK-LABEL: name: multi_def_renaming
     ; CHECK: liveins: $vgpr3, $vgpr4_vgpr5
     ; CHECK-NEXT: {{  $}}
-    ; CHECK-NEXT: %bb0_cb7ce318324a7ba8__1:vreg_64, %bb0_cb7ce318324a7ba8__2:sreg_64 = V_MAD_U64_U32_e64 $vgpr3, $vgpr3, $vgpr4_vgpr5, 0, implicit $exec
-    ; CHECK-NEXT: S_NOP 0, implicit-def %bb0_ac008e8cd8069470__1, implicit-def %bb0_ac008e8cd8069470__2, implicit-def %bb0_ac008e8cd8069470__3
-    ; CHECK-NEXT: %bb0_640fe5cc4c57ace5__1:vgpr_32 = COPY %bb0_cb7ce318324a7ba8__2.sub0
+    ; CHECK-NEXT: %bb0_[[V_MAD_DEF_HASH:[[:xdigit:]]+]]__1:vreg_64, %bb0_[[V_MAD_DEF_HASH]]__2:sreg_64 = V_MAD_U64_U32_e64 $vgpr3, $vgpr3, $vgpr4_vgpr5, 0, implicit $exec
+    ; CHECK-NEXT: S_NOP 0, implicit-def %bb0_[[S_NOP_DEF_HASH:[[:xdigit:]]+]]__1, implicit-def %bb0_[[S_NOP_DEF_HASH]]__2, implicit-def %bb0_[[S_NOP_DEF_HASH]]__3
+    ; CHECK-NEXT: %bb0_[[COPY_DEF_HASH:[[:xdigit:]]+]]__1:vgpr_32 = COPY %bb0_[[V_MAD_DEF_HASH]]__2.sub0
     ; CHECK-NEXT: S_ENDPGM 0
     %0:vreg_64, %1:sreg_64 = V_MAD_U64_U32_e64 $vgpr3, $vgpr3, $vgpr4_vgpr5, 0, implicit $exec
     S_NOP 0, implicit-def %2:vreg_256, implicit-def %3:vreg_256, implicit-def %4:vreg_256



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