[llvm] [RegisterCoalescer] Fix failing coalescer test for commuting instructions (PR #173043)

[via llvm-commits]

https://github.com/KRM7 created https://github.com/llvm/llvm-project/pull/173043

Fix for the failing tests introduced in #169031

>From 768c6730ba34c62573330f00ce0ccff984bf5ec4 Mon Sep 17 00:00:00 2001
From: KRM7 <70973547+KRM7 at users.noreply.github.com>
Date: Fri, 19 Dec 2025 17:37:56 +0100
Subject: [PATCH] [RegisterCoalescer] Fix failing coalescer test for commuting
 instructions

Fix for the failing tests introduced in #169031
---
 .../coalesce-commutative-tied-def-subreg.mir  | 70 +++++++++++--------
 1 file changed, 42 insertions(+), 28 deletions(-)

diff --git a/llvm/test/CodeGen/X86/coalesce-commutative-tied-def-subreg.mir b/llvm/test/CodeGen/X86/coalesce-commutative-tied-def-subreg.mir
index 59560f318ff3d..22532717dbdc4 100644
--- a/llvm/test/CodeGen/X86/coalesce-commutative-tied-def-subreg.mir
+++ b/llvm/test/CodeGen/X86/coalesce-commutative-tied-def-subreg.mir
@@ -1,43 +1,57 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-# RUN: llc -mtriple=x86_64 -run-pass=register-coalescer -o - %s | FileCheck %s
+# RUN: llc -mtriple=x86_64 -run-pass=register-coalescer -verify-coalescing -o - %s | FileCheck %s
 
 # The COPY can't be removed by commuting the AND since the instruction only partially defines the register
 ---
 name: commute_tied_subreg_def_part
 tracksRegLiveness: true
-body: |
+body:             |
+  ; CHECK-LABEL: name: commute_tied_subreg_def_part
+  ; CHECK: bb.0:
+  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   undef [[DEF:%[0-9]+]].sub_32bit:gr64_with_sub_8bit = IMPLICIT_DEF
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.1:
+  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   undef [[MOV32ri:%[0-9]+]].sub_32bit:gr64_with_sub_8bit = MOV32ri 0
+  ; CHECK-NEXT:   [[MOV32ri:%[0-9]+]].sub_32bit:gr64_with_sub_8bit = AND32rr [[MOV32ri]].sub_32bit, [[DEF]].sub_32bit, implicit-def dead $eflags
+  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:gr64_with_sub_8bit = COPY [[MOV32ri]]
+  ; CHECK-NEXT:   JMP_1 %bb.1
   bb.0:
-    ; CHECK-LABEL: name: commute_tied_subreg_def_part
-    ; CHECK: %A:gr64_with_sub_8bit = MOV64rm $noreg, 1, $noreg, 0, $noreg :: (volatile load (s64))
-    ; CHECK-NEXT: %B:gr64_with_sub_8bit = MOV64rm $noreg, 1, $noreg, 0, $noreg :: (load (s64))
-    ; CHECK-NEXT: %A.sub_32bit:gr64_with_sub_8bit = AND32rr %A.sub_32bit, %B.sub_32bit, implicit-def dead $eflags
-    ; CHECK-NEXT: MOV64mr $noreg, 1, $noreg, 0, $noreg, %A :: (store (s64))
-    ; CHECK-NEXT: %B:gr64_with_sub_8bit = COPY %A
-    ; CHECK-NEXT: RET 0, implicit %B
-    %A:gr64_with_sub_8bit = MOV64rm $noreg, 1, $noreg, 0, $noreg :: (volatile load (s64))
-    %B:gr64_with_sub_8bit = MOV64rm $noreg, 1, $noreg, 0, $noreg :: (load (s64))
-    %A.sub_32bit:gr64_with_sub_8bit = AND32rr %A.sub_32bit, %B.sub_32bit, implicit-def dead $eflags
-    MOV64mr $noreg, 1, $noreg, 0, $noreg, %A :: (store (s64))
-    %B:gr64_with_sub_8bit = COPY %A
-    RET 0, implicit %B
+    undef %0.sub_32bit:gr64_with_sub_8bit = IMPLICIT_DEF
+
+  bb.1:
+    undef %1.sub_32bit:gr64_with_sub_8bit = MOV32ri 0
+    %1.sub_32bit:gr64_with_sub_8bit = AND32rr %1.sub_32bit, %0.sub_32bit, implicit-def dead $eflags
+    %0:gr64_with_sub_8bit = COPY %1
+    JMP_1 %bb.1
 ...
 
 # The COPY can be removed by commuting the AND since the instruction defines the entire register
 ---
 name: commute_tied_subreg_def_full
 tracksRegLiveness: true
-body: |
+body:             |
+  ; CHECK-LABEL: name: commute_tied_subreg_def_full
+  ; CHECK: bb.0:
+  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   undef [[DEF:%[0-9]+]].sub_32bit:gr64_with_sub_8bit = IMPLICIT_DEF
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.1:
+  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   undef [[MOV32ri:%[0-9]+]].sub_32bit:gr64_with_sub_8bit = MOV32ri 0
+  ; CHECK-NEXT:   [[DEF:%[0-9]+]].sub_32bit:gr64_with_sub_8bit = AND32rr [[DEF]].sub_32bit, [[MOV32ri]].sub_32bit, implicit-def dead $eflags, implicit-def [[DEF]]
+  ; CHECK-NEXT:   JMP_1 %bb.1
   bb.0:
-    ; CHECK-LABEL: name: commute_tied_subreg_def_full
-    ; CHECK: %A:gr64_with_sub_8bit = MOV64rm $noreg, 1, $noreg, 0, $noreg :: (volatile load (s64))
-    ; CHECK-NEXT: %B:gr64_with_sub_8bit = MOV64rm $noreg, 1, $noreg, 0, $noreg :: (load (s64))
-    ; CHECK-NEXT: %B.sub_32bit:gr64_with_sub_8bit = AND32rr %B.sub_32bit, %A.sub_32bit, implicit-def dead $eflags, implicit-def %B
-    ; CHECK-NEXT: MOV64mr $noreg, 1, $noreg, 0, $noreg, %B :: (store (s64))
-    ; CHECK-NEXT: RET 0, implicit %B
-    %A:gr64_with_sub_8bit = MOV64rm $noreg, 1, $noreg, 0, $noreg :: (volatile load (s64))
-    %B:gr64_with_sub_8bit = MOV64rm $noreg, 1, $noreg, 0, $noreg :: (load (s64))
-    %A.sub_32bit:gr64_with_sub_8bit = AND32rr %A.sub_32bit, %B.sub_32bit, implicit-def dead $eflags, implicit-def %A
-    MOV64mr $noreg, 1, $noreg, 0, $noreg, %A :: (store (s64))
-    %B:gr64_with_sub_8bit = COPY %A
-    RET 0, implicit %B
+    undef %0.sub_32bit:gr64_with_sub_8bit = IMPLICIT_DEF
+
+  bb.1:
+    undef %1.sub_32bit:gr64_with_sub_8bit = MOV32ri 0
+    %1.sub_32bit:gr64_with_sub_8bit = AND32rr %1.sub_32bit, %0.sub_32bit, implicit-def dead $eflags, implicit-def %1
+    %0:gr64_with_sub_8bit = COPY %1
+    JMP_1 %bb.1
 ...