[llvm] [MIRVRegNamerUtils] Handle instructions with multiple definitions (PR #172982)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Fri Dec 19 07:43:18 PST 2025


================
@@ -0,0 +1,21 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -mtriple=amdgcn -run-pass mir-canonicalizer -mir-vreg-namer-use-stable-hash -verify-machineinstrs %s -o - | FileCheck %s
+
+---
+name: multi_def_renaming
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $vgpr3, $vgpr4_vgpr5
+
+    ; CHECK-LABEL: name: multi_def_renaming
+    ; CHECK: liveins: $vgpr3, $vgpr4_vgpr5
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: %bb0_cb7ce318324a7ba8__1:vreg_64, %bb0_cb7ce318324a7ba8__2:sreg_64 = V_MAD_U64_U32_e64 $vgpr3, $vgpr3, $vgpr4_vgpr5, 0, implicit $exec
+    ; CHECK-NEXT: %bb0_640fe5cc4c57ace5__1:vgpr_32 = COPY %bb0_cb7ce318324a7ba8__2.sub0
+    ; CHECK-NEXT: S_ENDPGM 0
+    %0:vreg_64, %1:sreg_64 = V_MAD_U64_U32_e64 $vgpr3, $vgpr3, $vgpr4_vgpr5, 0, implicit $exec
+    %2:vgpr_32 = COPY %1.sub0
+
+    S_ENDPGM 0
+...
----------------
arsenm wrote:

Also check an instruction with trailing implicit defs 

https://github.com/llvm/llvm-project/pull/172982


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