[llvm] [AMDGPU][Scheduler] Scoring system for rematerialization candidates (PR #153092)
Lucas Ramirez via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 19 07:43:14 PST 2025
================
@@ -2086,65 +2327,93 @@ void PreRARematStage::rematerialize() {
assert((SR.LaneMask & UncoveredLanes).none());
}
}
+ }
#endif
- // The register is no longer a live-in in all regions but the one that
- // contains the single use. In live-through regions, maximum register
- // pressure decreases predictably so we can directly update it. In the
- // using region, maximum RP may or may not decrease, so we will mark it
- // for re-computation after all materializations have taken place.
- LaneBitmask PrevMask = RegionLiveIns[Reg];
- RegionLiveIns.erase(Reg);
- RegMasks.insert({{I, Remat.RematMI->getOperand(0).getReg()}, PrevMask});
- if (Remat.UseMI->getParent() != DAG.Regions[I].first->getParent())
- DAG.Pressure[I].inc(Reg, PrevMask, LaneBitmask::getNone(), DAG.MRI);
- else
- RecomputeRP.insert(I);
+ // This save is guaranteed in regions in which the register is live-through
+ // and unused but optimistic in all other regions where the register is
+ // live.
+ RPTargets[I].saveReg(Reg, Remat.Mask, DAG.MRI);
+ DAG.LiveIns[I].erase(Reg);
+ DAG.RegionLiveOuts.getLiveRegsForRegionIdx(I).erase(Reg);
+ if (!Remat.isUnusedLiveThrough(I))
+ RecomputeRP.set(I);
+ }
+
+ DAG.deleteMI(Remat.DefRegion, &DefMI);
+ RescheduleRegions |= Remat.Live;
+}
+
+void PreRARematStage::rollback(const RollbackInfo &Rollback,
----------------
lucas-rami wrote:
I am not finding a way to make the rematerialized MIs "transparent" to the scheduler during rescheduling post-remat. In particular, I don't think there is a way that I can make the unused defined register not contribute to RP, and this is causing regressions in some tests. Am I missing a way to do that cleanly?
https://github.com/llvm/llvm-project/pull/153092
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