[llvm] [RISCV] Handle codegen for Big Endian (PR #172668)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 17 12:05:13 PST 2025
================
@@ -220,6 +222,7 @@ class RISCVSubtarget : public RISCVGenSubtargetInfo {
}
bool is64Bit() const { return IsRV64; }
+ bool isLittleEndian() const { return TargetTriple.isLittleEndian(); }
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topperc wrote:
Can we cache this in a bool in the constructor?
https://github.com/llvm/llvm-project/pull/172668
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