[clang] [llvm] [X86] EmitX86BuiltinExpr - attempt to convert SSE41/AVX1 roundps/d/ss/sd builtins to regular rounding modes (PR #171227)

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 17 02:14:34 PST 2025


================
@@ -75,6 +75,74 @@ static Value *getMaskVecValue(CodeGenFunction &CGF, Value *Mask,
   return MaskVec;
 }
 
+// Emit rounding for the value X according to the rounding RoundingControl.
+static Value *emitX86Round(CodeGenFunction &CGF, Value *X,
+                           unsigned RoundingControl) {
+  unsigned RoundingMask = 0b11;
+  unsigned UseMXCSRBit = 0b1000;
+
+  unsigned RoundingMode = RoundingControl & RoundingMask;
+  bool UseMXCSR = RoundingControl & UseMXCSRBit;
+
+  Intrinsic::ID ID = Intrinsic::not_intrinsic;
+  LLVMContext &Ctx = CGF.CGM.getLLVMContext();
+  if (CGF.Builder.getIsFPConstrained()) {
+
+    Value *ExceptMode =
+        MetadataAsValue::get(Ctx, MDString::get(Ctx, "fpexcept.ignore"));
+
+    if (UseMXCSR) {
+      ID = Intrinsic::experimental_constrained_nearbyint;
----------------
RKSimon wrote:

TBH I'd prefer it if we kept to the original x86.*.round.* intrinsics in all UseMXCSR cases

https://github.com/llvm/llvm-project/pull/171227


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